EP0426183A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Programmable input/output delay between accesses
Assignee: Compaq Computer Corp
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Filing: 1990-11-02
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Granted: —
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Expires: 2010-11-02
Abstract
Abstract An apparatus for use in a computer system which delays operation when a wait signal is present, the apparatus providing a delay between back-to-back input/output cycles, the apparatus comprising: means for storing a programmed value that represents the length of delay to be provided between said back-to-back input/output cycles; means coupled to said storing means for producing a signal representing said length of delay; and means receiving said length of delay signal for generating the wait signal that delays the start of a successive inpt/output cycle for the length of time of said programmed delay.
Inventors
- 👤 Maria L. Melo
- 👤 John A. Landry
- 👤 Paul R. Culley
- 👤 Alan L. Goodrum
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 10:01
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4009; G06F13/4018; G06F13/14; G06F13/20; G06F13/24; G06F13/26; G06F13/36; G06F13/362; G06F13/4063; G06F13/4068; G06F13/4072; G06F13/409; G06F13/42; G06F13/4204; G06F13/4221; G06F13/423
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
95 words
An apparatus for use in a computer system which delays operation when a wait signal is present, the apparatus providing a delay between back-to-back input/output cycles, the apparatus comprising: means for storing a programmed value that represents the length of delay to be provided between said back-to-back input/output cycles; means coupled to said storing means for producing a signal representing said length of delay; and means receiving said length of delay signal for generating the wait signal that delays the start of a successive input/output cycle for the length of time of said programmed delay.
Claim 2
Independent Claim
95 words
An apparatus for use in a computer system which delays operation when a wait signal is present, the apparatus providing a delay between back-to-back input/output cycles, the apparatus comprising: means for storing a programmed value that represents the length of delay to be provided between said back-to-back input/output cycles; means coupled to said storing means for producing a signal representing said length of delay; and means receiving said length of delay signal for generating the wait signal that delays the start of a successive input/output cycle for the length of time of said programmed delay.
Claim 3
Dependent Claim
23 words
The apparatus of claim 1, wherein said means for generating the wait signal includes means for counting out a predetermined length of delay.
Claim 4
Dependent Claim
29 words
The apparatus of claim 1 or 2, wherein said means for producing includes means for producing a signal which is pulse position modulated to represent the length of delay.
Claim 5
Dependent Claim
69 words
The apparatus of claim 3, wherein said means for producing said pulse position modulated signal includes: a decoder having a series of outputs and connected to said storing means for receiving said programmed value and producing a value on said output representative of said programmed value; and a shift register having parallel inputs connected to said decoder outputs and having one output which provides said pulse position modulated signal;
Claim 6
Independent Claim
23 words
The apparatus of any of claims 2 to 4, wherein said means for counting out said predetermined length of delay includes a counter.
Claim 7
Dependent Claim
22 words
The apparatus of. claim 5, wherein said means for generating provides the wait signal while said counter is in a non-zero state.
Claim 8
Dependent Claim
18 words
The apparatus of claim 5, wherein said counter counts down from a predetermined value to a zero value.
Claim 9
Dependent Claim
27 words
The apparatus of claim 7, wherein said counter is initialized to a predetermined value dependent upon the data width of the input/output cycle which has been completed.
Claim 10
Independent Claim
18 words
The apparatus of any preceding claim, wherein said means for storing said programmed value includes a storage register.
References Cited (Backward Citations)
No citation records indexed.
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