EP0425779A2
Expired / Lapsed
EP
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Apparatus and method for transmitting commands
Assignee: International Business Machines Corp
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Filing: 1990-08-17
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Granted: —
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Expires: 2010-08-17
Abstract
Abstract An apparatus and method for transmitting commands over a serial link having a switch (10) intermediate a channel and a control unit wherein continuous sequences of idle characters (K.28.5) are sent over the link for maintaining character synchronization. Commands and response information is sent between ports (P) of the switch and the channel (22, 24) and/or the control unit (26, 29) by modifying every other idle character to a modified idle character to which a command or response function has been assigned. In the modification, a selected number of the bits of the idle character are held invariant, and only those bits are varied which form data characters according to the rules of the 8B/10B encoding method. Code points for a total of 124 modified idle characters are disclosed to which a separate command or response may be assigned.
Inventors
- 👤 Thomas Anthony Gregg
- 👤 Leon Skarshinski
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 02:19
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4906; H04L25/4908; H04L7/00; H04L7/0079; H04L7/0083
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
99 words
Apparatus for generating commands in a system wherein multi-bit characters are continuously sent from a sender to a receiver to acquire character synchronization, characterized by register means (310) for providing a multi-bit idle character; by bit modifying means (312) connected to said register means for changing selected bits of said multi-bit idle character for forming a command character which is a modification of said multi-bit idle character; and by multiplexing means (315) for forming an ordered set of characters, said ordered set having said multi-bit idle character as a first character and said command character as a second character.
Claim 2
Dependent Claim
99 words
Apparatus for generating commands in a system wherein multi-bit characters are continuously sent from a sender to a receiver to acquire character synchronization, characterized by register means (310) for providing a multi-bit idle character; by bit modifying means (312) connected to said register means for changing selected bits of said multi-bit idle character for forming a command character which is a modification of said multi-bit idle character; and by multiplexing means (315) for forming an ordered set of characters, said ordered set having said multi-bit idle character as a first character and said command character as a second character.
Claim 3
Dependent Claim
59 words
Apparatus of claim 1, characterized in that the register means (310) is a latch in which the bits of each successive multi-bit idle character are inverted from the previously provided multi-bit idle character such that said first character of said ordered set has a first disparity and said second character of said ordered set has a second, opposite disparity.
Claim 4
Dependent Claim
33 words
Apparatus of claim 2, characterized in that the first character of said ordered set is a K28.5+ idle character and said second character of said ordered set is a modified K28.5- idle character.
Claim 5
Dependent Claim
70 words
Apparatus for sending and receiving synchronizing multi-bit characters, characterized by a recognition circuit (306) having an input for receiving an ordered set and an output for providing a FUNCTION OUT message, said recognition circuit having detection means (324, 326) for detecting a first idle character in said received ordered set and latch means (332) for providing said FUNCTION OUT message responsive to a second character in said received ordered set.
Claim 6
Dependent Claim
70 words
Apparatus for sending and receiving synchronizing multi-bit characters, characterized by a recognition circuit (306) having an input for receiving an ordered set and an output for providing a FUNCTION OUT message, said recognition circuit having detection means (324, 326) for detecting a first idle character in said received ordered set and latch means (332) for providing said FUNCTION OUT message responsive to a second character in said received ordered set.
Claim 7
Dependent Claim
36 words
Apparatus of claim 4, characterized in that detection means comprises a first detector for detecting an idle character having a first disparity, and a second detector for detecting an idle character having a second, opposite disparity.
Claim 8
Dependent Claim
24 words
Apparatus of claim 5, characterized in that the first detector detects a K28.5+ idle character and said second detector detects a K28.5- idle character.
Claim 9
Dependent Claim
65 words
Apparatus of claim 5, characterized in that said first detector and said second detector have outputs, and said recognition circuit further comprises a synchronization means connected to the outputs of said first and second detectors, said synchronization means (327) for synchronizing said first and second detectors until one of said first or second detectors detects a first idle character of one of said ordered sets.
Claim 10
Dependent Claim
47 words
Apparatus of claim 7, characterized in that said recognition circuit further comprises a state machine (330) connected to the outputs of said first and second detectors, said state machine having an error state representative of two idle characters having the same disparity being detected in a row.
Claim 11
Dependent Claim
28 words
Apparatus of claim 8, characterized in that said latch means (332) latches selected ones of the most significant bits of said second character as said FUNCTION OUT message.
Claim 12
Dependent Claim
49 words
Apparatus of claim 9, characterized in that said detection means further comprises a third detector (328) for detecting a selected sub-block of least significant bits of said second character, said selected sub-block of least significant bits being selected to be invariant in selected available characters of said second character.
Claim 13
Dependent Claim
83 words
Apparatus of claim 10, characterized in that said third detector has an output connected to said state machine, said state machine having an idle detect state representative of an idle character being detected by said detection means, and a FUNCTION OUT state representative of said sub-block being detected by said third detector, said state machine only allowing state moves to said FUNCTION OUT state from said idle detect state such that FUNCTION OUT messages are provided upon the detection of said ordered sets.
Claim 14
Dependent Claim
55 words
Apparatus of claim 4, characterized by sequence generating means (320) having an input and an output, said sequence generating means generating ordered sets of characters on its output wherein the first character of each ordered set is an idle character and the second character of each ordered set is a modification of said idle character.
Claim 15
Dependent Claim
152 words
Apparatus as set forth in one of claims 1-12, synchronized by the continuous transmission of multi-bit characters, characterized by a switch (10) having at least two ports (12, 14); and by a switch controller (20) for controlling switching between said ports by said switch; by each of said ports including an input for receiving data characters transmitted to said port and an output for sending data characters transmitted from said port; by each of said ports further including a recognition circuit (306) having an input for receiving an ordered set of said multi-bit characters from its attached link and an output connected to said switch controller for providing to said switch controller a FUNCTION OUT message, said recognition circuit having detection means for detecting a first idle character in said received ordered set, and latch means for providing said FUNCTION OUT message responsive to a second character in said received ordered set.
Claim 16
Dependent Claim
37 words
Apparatus of claim 13, characterized in that said detection means comprises a first detector for detecting an idle character having a first disparity, and a second detector for detecting an idle character having a second, opposite disparity.
Claim 17
Dependent Claim
24 words
Apparatus of claim 14, characterized in that said first detector detects a K28.5+ idle character and said second detector detects a K28.5- idle character.
Claim 18
Dependent Claim
64 words
Apparatus of claim 15, characterized in that said first detector and said second detector have outputs, and said recognition circuit further comprises a synchronization means connected to the outputs of said first and second detectors, said synchronization means for synchronizing said first and second detectors until one of said first or second detectors detects a first idle character of one of said ordered sets.
Claim 19
Dependent Claim
46 words
Apparatus of claim 16, characterized in that said recognition circuit further comprises a state machine connected to the outputs of said first and second detectors, said state machine having an error state representative of two idle characters having the same disparity being detected in a row.
Claim 20
Dependent Claim
27 words
Apparatus of claim 17, characterized in that said latch means latches selected ones of the most significant bits of said second character as said FUNCTION OUT message.
Claim 21
Dependent Claim
48 words
Apparatus of claim 18, characterized in that said detection means further comprises a third detector for detecting a selected sub-block of least significant bits of said second character, said selected sub-block of least significant bits being selected to be invariant in selected available characters of said second character.
Claim 22
Dependent Claim
83 words
Apparatus of claim 19, characterized in that said third detector has an output connected to said state machine, said state machine having an idle detect state representative of an idle character being detected by said detection means, and a FUNCTION OUT state representative of said sub-block being detected by said third detector, said state machine only allowing state moves to said FUNCTION OUT state from said idle detect state such that FUNCTION OUT messages are provided upon the detection of said ordered sets.
Claim 23
Dependent Claim
54 words
Apparatus of claim 20, characterized by sequence generating means having an input and an output, said sequence generating means generating ordered sets of characters on its output wherein the first character of each ordered set is an idle character and the second character of each ordered set is a modification of said idle character.
Claim 24
Dependent Claim
81 words
Apparatus of claim 13, characterized by a link attached to each port, each of said links having two data transmission conductors, one data transmission conductor connected to the input of the attached port for transmitting data to the attached port and the other data transmission conductor connected to the output of the attached port for transmitting data from the attached port; and by a link-level facility attached to each link for sending data to and receiving data from the attached port.
Claim 25
Dependent Claim
146 words
Method of selecting a second character of an ordered set wherein the first character of said ordered set is an idle character and the second characters is a command character for an apparatus of one of claim 1-22, characterized by steps of: a. establishing said idle character as a base character; b. arranging all valid 8B/10B data characters in sequence such that the first 8B/10B data character has the maximum number of its least significant bits in the same pattern as the base character and the last 8B/10B data character in the sequence has none of its least significant bits in the same pattern as the base character; and c. selecting the number of 8B/10B data characters in the sequence as the number of command characters desired such that the maximum number of least significant bits of the command characters are invarient from the base character.
References Cited (Backward Citations)
No citation records indexed.
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