EP0424011A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Integrated-circuit device isolation
Assignee: AT&T Inc
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Filing: 1990-10-10
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Granted: —
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Expires: 2010-10-10
Abstract
Abstract In the manufacture of integrated-circuit semiconductor devices, prior to formation of a field oxide(11), a mask structure(11,12,13,14) is provided on a silicon device area, comprising a pad oxide layer(11), a polysilicon buffer layer(12), a protective oxide layer(13), and a silicon nitride mask layer(14). Inclusion of the protective layer(13) between polysilicon(12) and silicon nitride(14) layers prevents pad oxide failure and attendant substrate etching during strip-etching of the structure(12,13,14) overlying the pad oxide(11).
Inventors
- 👤 Larry Bruce Fritzinger
- 👤 Kuo-Hua Lee
- 👤 Chih-Yuan Lu
- 👤 Janmye Sung
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 19:58
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
114 words
In the manufacture of integrated-circuit semiconductor devices, a method for forming an isolation region(11) on a portion of a silicon surface, comprising forming an oxidation mask structure(11,12,13,14) on a first oxide layer(11) on said surface, said structure covering a device region excluded from said portion and comprising a buffer layer(12) consisting substantially of silicon, and a mask layer (14) substantially comprising silicon nitride, forming said isolation region by(11) oxidation, and removing said structure(12,13,14) from said device region by etching, CHARACTERIZED IN THAT, intermediary to said buffer layer and said mask layer a second oxide layer(13) is included, comprising silicon oxide, whereby, in the course of removing said structure, etching of the substrate is inhibited.
Claim 2
Dependent Claim
114 words
In the manufacture of integrated-circuit semiconductor devices, a method for forming an isolation region(11) on a portion of a silicon surface, comprising forming an oxidation mask structure(11,12,13,14) on a first oxide layer(11) on said surface, said structure covering a device region excluded from said portion and comprising a buffer layer(12) consisting substantially of silicon, and a mask layer (14) substantially comprising silicon nitride, forming said isolation region by(11) oxidation, and removing said structure(12,13,14) from said device region by etching, CHARACTERIZED IN THAT, intermediary to said buffer layer and said mask layer a second oxide layer(13) is included, comprising silicon oxide, whereby, in the course of removing said structure, etching of the substrate is inhibited.
Claim 3
Dependent Claim
17 words
The method of claim 1 in which removing said structure comprises wet etching of said mask layer.
Claim 4
Dependent Claim
14 words
The method of claim 2 in which wet etching comprises exposure to phosphoric acid.
Claim 5
Dependent Claim
17 words
The method of claim 1 in which removing said structure comprises plasma etching of said buffer layer(12).
Claim 6
Dependent Claim
15 words
The method of claim 4 in which plasma etching comprises exposure to a chlorine-oxygen plasma.
Claim 7
Dependent Claim
16 words
The method of claim 1 in which said second oxide layer is formed by thermal growth.
Claim 8
Dependent Claim
15 words
The method of claim 1 in which said second oxide layer is formed by deposition.
Claim 9
Dependent Claim
16 words
The method of claim 1 in which said first oxide layer is formed by thermal growth.
Claim 10
Dependent Claim
23 words
The method of claim 1 in which said oxidation mask structure is anisotropically etched in the presence of a photolithographically patterned resist layer.
References Cited (Backward Citations)
No citation records indexed.
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