Patent US3936323A successfully refreshed from Google Patents.
EP0423722A2
Expired / Lapsed
EP
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Method of making complete dielectric isolation structure in semiconductor integrated circuit
Assignee: Toshiba Corp
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Filing: 1990-10-16
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Granted: —
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Expires: 2010-10-16
Abstract
Abstract For controlling unwanted production of crystal defects from corners (6, 7) of isolated regions in a complete dielectric isolation structure, after at least one trench (5) or groove is provided through a mask of an insulating film (4) in a semiconductor substrate (3) adhered to an insulating film (2) of a base substrate (1), the mask (4) is side-etched and the insulating film (2) of the base substrate (1) is selectively etched at the same time to expose corners (6, 7) of the semiconductor substrate (3). The exposed corners (6, 7) of the semiconductor substrate (3) is then subjected to isotropic etching to remove a pointed portion therefrom. Thereafter, side surfaces of the semiconductor substrate (3) exposed within the trench (5) is oxidized to provide an insulting film (8) for dielectric isolation which has rounded corners.
Inventors
- 👤 Yoshiro C/O Intellectual Property Division Baba
- 👤 Yutaka C/O Intellectual Property Div. Koshino
- 👤 Akihiko C/O Intellectual Property Div. Osawa
- 👤 Satoshi C/O Intellectual Property Div. Yanagiya
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 01:38
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W10/041; H10W10/061; H10W10/10; H10W10/13; H10W10/181; H10W10/40; H10W10/014; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
179 words
A method of making a complete dielectric isolation structure in a semiconductor integrated circuit comprising preparing a base substrate (1) having a first insulating film (2) thereon, adhering a semiconductor substrate (3) to said first insulating film (2) of said base substrate (1), forming a second insulating film (4) on said semiconductor substrate (3), patterning said second insulating film (4) to provide a mask on said semiconductor substrate (3), selectively etching said semiconductor substrate (3) through said mask to provide at least one trench (5) reaching to said first insulating film (2), oxidizing side surfaces of said semiconductor substrate (3) exposed within said trench (5) to provide a third insulating film (8) thereon, and filling said trench (5) with a polysilicon layer, characterized in that before oxidizing said side surfaces of said semiconductor substrate (3), said mask is side-etched and said first insulating film (2) is selectively etched at the same time to expose corners (6, 7) of said semiconductor substrate (3), and that said exposed corners (6, 7) of said semiconductor substrate (3) is subjected to isotropic etching.
Claim 2
Independent Claim
179 words
A method of making a complete dielectric isolation structure in a semiconductor integrated circuit comprising preparing a base substrate (1) having a first insulating film (2) thereon, adhering a semiconductor substrate (3) to said first insulating film (2) of said base substrate (1), forming a second insulating film (4) on said semiconductor substrate (3), patterning said second insulating film (4) to provide a mask on said semiconductor substrate (3), selectively etching said semiconductor substrate (3) through said mask to provide at least one trench (5) reaching to said first insulating film (2), oxidizing side surfaces of said semiconductor substrate (3) exposed within said trench (5) to provide a third insulating film (8) thereon, and filling said trench (5) with a polysilicon layer, characterized in that before oxidizing said side surfaces of said semiconductor substrate (3), said mask is side-etched and said first insulating film (2) is selectively etched at the same time to expose corners (6, 7) of said semiconductor substrate (3), and that said exposed corners (6, 7) of said semiconductor substrate (3) is subjected to isotropic etching.
Claim 3
Dependent Claim
23 words
The method according to claim 1, characterized in that said corners of said semiconductor substrate (3) include upper and lower corners (6, 7).
Claim 4
Dependent Claim
23 words
The method according to claim 1, characterized in that said isotropic etching provides an arc-shaped recessed portion at said exposed corners (6, 7).
Claim 5
Dependent Claim
24 words
The method according to claim 1, characterized in that a thickness of said third insulating film (8) is of the order of 8000 Å.
Claim 6
Dependent Claim
53 words
The method according to claim 4, characterized in that a quantity (X) for side-etching said mask is defined by 3000 Å ≦ X ≦ 10000 Å while a quantity (Y) for isotropioally etching said exposed corners (6, 7) of said semiconductor substrate (3) is defined by 1500 Å ≦ Y ≦ 5000 Å.
Claim 7
Dependent Claim
19 words
The method according to claim 1, characterized in that said base substrate (1) is comprised of a semiconductor substrate.
Claim 8
Dependent Claim
18 words
The method according to claim 1, characterized in that an exposed surface of said polysilicon layer is oxidized.
Claim 9
Dependent Claim
19 words
The method according to claim 1, characterized in that said mask is comprised of said second insulating film (4).
References Cited (Backward Citations)
No citation records indexed.
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