EP0420405A2
Expired / Lapsed
EP
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Integrated circuit comprising interconnections
Assignee: Delco Electronics LLC
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Filing: 1990-08-10
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Granted: —
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Expires: 2010-08-10
Abstract
Abstract A multilevel electrically conductive interconnect (12,20) is provided for an integrated circuit wherein an intermediate dual dielectric layer (18) is formed between the non-contacting portions of the conductors forming the conductive interconnect. The dual dielectric layer consists of a first dielectric layer (14) and a second dielectric layer (16), the latter, being formed from a polyimide material. The dual dielectric layer provides a significant improvement in defect density and a substantially planarized surface (26) for the deposition of the top conductor (20), thereby improving the reliability and integrity of the electrical interconnection and of the integrated circuit.
Inventors
- 👤 Ronald K. Leisure
- 👤 Ronald K. Reger
- 👤 Oya F. Larsen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 08:37
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/01; H10W20/071; H10W20/092; Y; Y10; Y10S; Y10S148/00; Y10S148/043
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
135 words
A method of forming an integrated circuit comprising a multilevel conductive interconnection; the method comprising providing an appropriate substrate (10); forming a first conductive layer (12) on the substrate; forming a first dielectric layer (14) over the first conductive layer such that the first dielectric layer covers all but a portion of the first conductive layer; forming a second dielectric layer (16) over the first dielectric layer so as to form a dual dielectric layer (18) comprising the first dielectric layer and the second dielectric layer; and forming a second conductive layer (20) on the dual dielectric layer such that the second conductive layer contacts the first conductive layer at said portion of the first conductive layer; thereby forming a multilevel conductive interconnect having a dual dielectric layer between the first and second conductive layers.
Claim 2
Independent Claim
135 words
A method of forming an integrated circuit comprising a multilevel conductive interconnection; the method comprising providing an appropriate substrate (10); forming a first conductive layer (12) on the substrate; forming a first dielectric layer (14) over the first conductive layer such that the first dielectric layer covers all but a portion of the first conductive layer; forming a second dielectric layer (16) over the first dielectric layer so as to form a dual dielectric layer (18) comprising the first dielectric layer and the second dielectric layer; and forming a second conductive layer (20) on the dual dielectric layer such that the second conductive layer contacts the first conductive layer at said portion of the first conductive layer; thereby forming a multilevel conductive interconnect having a dual dielectric layer between the first and second conductive layers.
Claim 3
Dependent Claim
36 words
A method accord.ing to claim 1, comprising depositing a third dielectric layer (22) over the first and second conductive layers and the first and second dielectric layers so as substantially to envelop the second dielectric layer.
Claim 4
Dependent Claim
46 words
A method according to claim 1 or 2, wherein the substrate is of silicon, the first and second conductive layers one of metal, the first dielectric layer is of silicon oxide or silicon nitride and the second dielectric layer is made of a polyimide dielectric material.
Claim 5
Dependent Claim
105 words
An integrated circuit comprising a multilevel conductive interconnection, the circuit comprising an appropriate substrate (10); a first conductive layer (12) provided on the substrate so as to form a first conductor; a first dielectric layer (14) arranged so as to cover all but a portion of the top surface of the first conductive layer; a second dielectric layer (16) provided on the first dielectric layer so as to form a dual dielectric layer (18) having a substantially planar surface (26); and a second conductive layer (20) provided on the substantially planar surface and contacting the first conductive layer at said portion of the top surface.
Claim 6
Dependent Claim
105 words
An integrated circuit comprising a multilevel conductive interconnection, the circuit comprising an appropriate substrate (10); a first conductive layer (12) provided on the substrate so as to form a first conductor; a first dielectric layer (14) arranged so as to cover all but a portion of the top surface of the first conductive layer; a second dielectric layer (16) provided on the first dielectric layer so as to form a dual dielectric layer (18) having a substantially planar surface (26); and a second conductive layer (20) provided on the substantially planar surface and contacting the first conductive layer at said portion of the top surface.
Claim 7
Dependent Claim
38 words
An integrated circuit according to claim 4, comprising a third dielectric layer (22) provided on the first and second conductive layers and the first and second dielectric layers so as substantially to envelop the second metal conductive layer.
Claim 8
Dependent Claim
47 words
An integrated circuit according to claim 4 or 5, wherein the substrate is of silicon; the first and second conductive layers are of metal; the first dielectric layer is of silicon oxide or silicon nitride; and the second dielectric layer is made of a polyimide dielectric material.
References Cited (Backward Citations)
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