3-D integrated circuit assembly employing discrete chips

Claim 2

An integrated circuit (IC) assembly, comprising: a substrate having first and second opposed sur­faces, and a plurality of recesses extending into the sub­strate from the first surface, a plurality of IC chips retained in respective recesses in the substrate, a plurality of conductive feedthroughs extending through the substrate between said first and second sur­faces, and connector means electrically connecting said IC chips to said feedthroughs along the first surface side of the substrate, said feedthroughs providing electrical paths between said chips and the opposite side of the substrate.

Claim 3

The IC assembly of claim 1, further comprising a network of conductive connections interconnecting said feedthroughs adjacent said second substrate surface.

Claim 4

The IC assembly of claim 2, said network compris­ing a series of alternating conductive and non-conductive network layers.

Claim 5

The IC assembly of claim 3, wherein said conduc­tive network layers are photolithographically patterned to establish desired interconnections between said IC chips.

Claim 6

The IC assembly of claim 2, further comprising respective thin film capacitors in at least some of said recesses electrically connecting on one side to the IC chips in said recesses, and conductive feedthroughs extend­ing through the substrate and electrically connecting the other sides of said capacitors to said network.

Claim 7

The IC assembly of claim 1, wherein said sub­strate is formed from a material that is generally thermal­ly matched with said IC chips.

Claim 8

The IC assembly of claim 6, wherein said IC chips are formed from silicon, and said substrate is formed from a material selected from the group consisting of silicon and aluminum nitride.

Claim 9

An integrated circuit (IC) carrier, comprising: a substrate having first and second opposed sur­faces, and a plurality of recesses adapted to receive re­spective IC chips extending into the substrate from the first surface, and a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, said feedthroughs being disposed to receive connectors from ICs in said recesses from the first surface side of said substrate, and to transmit electrical signals from said ICs to the opposite side of said sub­strate.

Claim 10

An integrated circuit (IC) carrier, comprising: a substrate having first and second opposed sur­faces, and a plurality of recesses adapted to receive re­spective IC chips extending into the substrate from the first surface, and a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, said feedthroughs being disposed to receive connectors from ICs in said recesses from the first surface side of said substrate, and to transmit electrical signals from said ICs to the opposite side of said sub­strate.

Claim 11

The IC carrier of claim 8, further comprising a network of conductive connections interconnecting said feedthroughs adjacent said second substrate surface.

Claim 12

The IC assembly of claim 9, said network compris­ing a series of alternating conductive and non-conductive network layers.

Claim 13

The IC assembly of claim 10, wherein said conduc­tive network layers are photolithographically patterned to establish desired interconnections between said IC chips.

Claim 14

An integrated circuit (IC) assembly, comprising: a substrate having first and second opposed sur­faces, an IC network disposed generally along the first substrate surface, a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, connector means electrically connecting selected locations in said IC network to said feedthroughs from the first surface side thereof, said feedthroughs providing electrical paths between said IC network and the opposite side of the substrate, and a network of conductive connectors between said feedthroughs adjacent said second substrate surface.

Claim 15

An integrated circuit (IC) assembly, comprising: a substrate having first and second opposed sur­faces, an IC network disposed generally along the first substrate surface, a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, connector means electrically connecting selected locations in said IC network to said feedthroughs from the first surface side thereof, said feedthroughs providing electrical paths between said IC network and the opposite side of the substrate, and a network of conductive connectors between said feedthroughs adjacent said second substrate surface.

Claim 16

The IC assembly of claim 12, said network of con­ductive connectors comprising a series of alternating con­ductive and non-conductive network layers.

Claim 17

The IC assembly of claim 13, wherein said conduc­tive network layers are photolithographically patterned to establish desired interconnections within said IC network.

Claim 18

An integrated circuit (IC) assembly, comprising: a substrate having a plurality of recesses ex­tending in from one surface thereof, and a plurality of IC chips retained in respective recesses in said substrate, said substrate being formed from a material that is generally thermally matched with said IC chips.

Claim 19

An integrated circuit (IC) assembly, comprising: a substrate having a plurality of recesses ex­tending in from one surface thereof, and a plurality of IC chips retained in respective recesses in said substrate, said substrate being formed from a material that is generally thermally matched with said IC chips.

Claim 20

The IC assembly of claim 15, wherein said IC chips are formed from silicon, and said substrate is formed from a material selected from the group consisting of sili­con and aluminum nitride.

Claim 21

A 3-D integrated circuit (IC) assembly, compris­ing: a plurality of stacked IC layers, each layer com­prising: a substrate having first and second opposed surfaces, and a plurality of recesses extending into the substrate from the first surface, a plurality of IC chips retained in respec­tive recesses in the substrate, a plurality of conductive feedthroughs ex­tending through the substrate between said first and second surfaces, connector means electrically connecting said IC chips to said feedthroughs along the first surface side of the substrate, said feedthroughs providing electrical paths between said chips and the opposite side of the sub­strate, and a network of conductive connections inter­connecting said feedthroughs adjacent said second substrate surface, means retaining said layers in a stack with their substrates mutually aligned and spaced apart from each other, and interlayer connector means electrically connect­ing selected locations on the IC chips with selected facing locations on the conductive interconnection network of the adjacent layer.

Claim 22

A 3-D integrated circuit (IC) assembly, compris­ing: a plurality of stacked IC layers, each layer com­prising: a substrate having first and second opposed surfaces, and a plurality of recesses extending into the substrate from the first surface, a plurality of IC chips retained in respec­tive recesses in the substrate, a plurality of conductive feedthroughs ex­tending through the substrate between said first and second surfaces, connector means electrically connecting said IC chips to said feedthroughs along the first surface side of the substrate, said feedthroughs providing electrical paths between said chips and the opposite side of the sub­strate, and a network of conductive connections inter­connecting said feedthroughs adjacent said second substrate surface, means retaining said layers in a stack with their substrates mutually aligned and spaced apart from each other, and interlayer connector means electrically connect­ing selected locations on the IC chips with selected facing locations on the conductive interconnection network of the adjacent layer.

Claim 23

The 3-D assembly of claim 17, said interlayer connector means comprising bridge springs on the IC chip sides of the substrates bearing against opposed bridge springs on the facing conductive interconnection network of the adjacent layer.

Claim 24

The 3-D IC assembly of claim 17, the network for each IC layer comprising a series of alternating conductive and non-conductive network layers.

Claim 25

The 3-D IC assembly of claim 19, wherein said conductive network layers are photolithographically pat­terned to establish desired interconnections between said IC chips.

Claim 26

The 3-D IC assembly of claim 17, wherein said substrates are formed from a material that is generally thermally matched with their respective IC chips.

Claim 27

The 3-D IC assembly of claim 21, wherein said IC chips are formed from silicon, said substrates are formed from a material selected from the group consisting of sili­con and aluminum nitride.

Claim 28

A 3-D integrated circuit (IC) assembly, compris­ing: a plurality of stacked IC layers, each layer com­prising: a substrate having first and second opposed surfaces, an IC network disposed generally along the first substrate surface, a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, connector means electrically connecting sel­ected locations in said IC network to said feedthroughs from the first surface side thereof, said feedthroughs pro­ viding electrical paths between said IC network and the opposite side of the substrate, and a network of conductive connectors between said feedthroughs adjacent said second substrate surface, means retaining said layers in a stack with their substrates mutually aligned and spaced apart from each other, and interlayer connector means electrically connect­ing selected locations on the IC chips with selected facing locations on the conductive interconnection network of the adjacent layer.

Claim 29

A 3-D integrated circuit (IC) assembly, compris­ing: a plurality of stacked IC layers, each layer com­prising: a substrate having first and second opposed surfaces, an IC network disposed generally along the first substrate surface, a plurality of electrically conductive feed­throughs extending through the substrate between said first and second surfaces, connector means electrically connecting sel­ected locations in said IC network to said feedthroughs from the first surface side thereof, said feedthroughs pro­ viding electrical paths between said IC network and the opposite side of the substrate, and a network of conductive connectors between said feedthroughs adjacent said second substrate surface, means retaining said layers in a stack with their substrates mutually aligned and spaced apart from each other, and interlayer connector means electrically connect­ing selected locations on the IC chips with selected facing locations on the conductive interconnection network of the adjacent layer.

Claim 30

The 3-D assembly of claim 23, said interlayer connector means comprising bridge springs on the IC chip sides of the substrates bearing against bridge springs on the facing conductive interconnection network of the adja­cent layer.

Claim 31

The 3-D IC assembly of claim 23, the network for each IC layer comprising a series of alternating conductive and non-conductive network layers.

Claim 32

The IC assembly of claim 25, wherein said conduc­tive network layers are photolithographically patterned to establish desired interconnections between said IC chips.