Nonvolatile semiconductor memory and method of producing the same

Abstract

Abstract A nonvolatile semiconductor memory having nonvolatile memory cells that electrically erase and write data. Each memory cell has a floating gate and a control gate formed on the channel region on the surface of a semiconductor substrate. The floating gate covers only part of the channel region. In the memory cell, therefore, a floating gate transistor and an enhancement transistor are connected in parallel. The floating gate transistor is deviated toward one side in the direction of width of the channel region or covers only the central portion of the channel region in the direction of width. Further, a plurality of memory cells are connected in series to constitute a basic block. The neighboring basic blocks are separated by the enhancement MOS transistor. In this memory, the memory cell (floating gate) and the enhancement MOS transistor (gate) are formed using the same mask in a self-aligned manner. In this memory, furthermore, the control gate and the floating gate are formed using the same mask in the self-aligned manner.

Inventors

• 👤 Masamichi Asano
• 👤 Hiroshi 63-10 Shikimidai Iwahashi
• 👤 Ryouhei Isogo-Dai-6-Ryo Kirisawa
• 👤 Ryozo Isogo-Maruyamadai-Heights 4-404 Nakayama
• 👤 Satoshi Sano-So 2F Inoue
• 👤 Riichiro Toshiba-Furukawa Apartment 242 Shirota
• 👤 Kikuna Endoh Tetsuro 6-13-31-106
• 👤 Fujio 1-14-6 Takeyama Masuoka

Bibliographic Details