← Back to Patent Explorer
EP0415542A3 Expired / Lapsed EP ⏱️ 0.0 years remaining

Programmable gate array with improved interconnect structure, input/output structure and configurable logic block

Assignee: Advanced Micro Devices Inc
•
Filing: 1990-07-20
•
Granted: —
•
Expires: 2010-07-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Om Prakash Agrawal
  • 👤 Michael James Wright
  • 👤 Ju Shen

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 10:42
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736; H03K19/1733; H03K19/1737; H03K19/17704; H03K19/17724; H03K19/17728; H03K19/17732; H03K19/17744

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

WO1986000165A1 Cited
US4706216A Cited
EP0358501A2 Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag