Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
130 words
An ultraviolet erasable non-volatile memory device comprising: a plurality of memory cells (10) for storing information, said memory cells (10) being erasable by ultraviolet rays; a reference cell (11) having the same structure as said memory cells (10), said reference cell (11), being erasable by ultraviolet rays; a sensing amplifier having a current mirror circuit (14, 15), one node (16) of said current mirror circuit (14, 15) being connected to said memory cells (10), the other node of said current mirror circuit (14, 15) being connected to said reference cell (11); means (19) for selecting said memory cells (10) by a signal which has a predetermined voltage; and means (12, 13) for driving said reference cell (11) by a signal, said signal having a voltage lower than said predetermined voltage.
Claim 2
Dependent Claim
130 words
An ultraviolet erasable non-volatile memory device comprising: a plurality of memory cells (10) for storing information, said memory cells (10) being erasable by ultraviolet rays; a reference cell (11) having the same structure as said memory cells (10), said reference cell (11), being erasable by ultraviolet rays; a sensing amplifier having a current mirror circuit (14, 15), one node (16) of said current mirror circuit (14, 15) being connected to said memory cells (10), the other node of said current mirror circuit (14, 15) being connected to said reference cell (11); means (19) for selecting said memory cells (10) by a signal which has a predetermined voltage; and means (12, 13) for driving said reference cell (11) by a signal, said signal having a voltage lower than said predetermined voltage.
Claim 3
Dependent Claim
57 words
A device according to claim 1 wherein said memory cells (10) and said reference cell (11) have a field effect transistor structure comprising a floating gate and a control gate stacked through insulating films, and said signals provided by said means (19) for selecting and said means (12, 13) for driving are supplied to said control gates.
Claim 4
Dependent Claim
32 words
A device according to claim 2 wherein said memory cells (10) are arranged in a two-dimensional matrix array of rows and columns, and said means (19) for selecting is a row decoder.
Claim 5
Dependent Claim
82 words
A device according to claim 1, claim 2 or claim 3 wherein said means (12, 13) for driving comprises an nMOS transistor (12) and a pMOS transistor (13), a drain and a gate of said nMOS transistor (12) being supplied with a power supply voltage, and a drain and a gate of said pMOS transistor (13) being supplied with earth potential, the sources of said nMOS transistor (12) and said pMOS transistor (13) being connected to said reference cell (11) in common.
Claim 6
Dependent Claim
113 words
An ultraviolet erasable non-volatile memory device comprising: a plurality of memory cells (30) for storing information, said memory cells (30) being erasable by ultraviolet rays; a reference cell (31) having the same structure as said memory cells (30), said reference cell (31) being erasable by ultraviolet rays; a sensing amplifier having a current mirror circuit (34, 35), one node (36) of said current mirror circuit (34, 35) being connected to said memory cells (30), the other node of said current mirror circuit (34, 35) being connected to said reference cell (31); a constant current source (32) connected to a node (36) between said memory cells (30) and said current mirror circuit (34, 35).
Claim 7
Dependent Claim
113 words
An ultraviolet erasable non-volatile memory device comprising: a plurality of memory cells (30) for storing information, said memory cells (30) being erasable by ultraviolet rays; a reference cell (31) having the same structure as said memory cells (30), said reference cell (31) being erasable by ultraviolet rays; a sensing amplifier having a current mirror circuit (34, 35), one node (36) of said current mirror circuit (34, 35) being connected to said memory cells (30), the other node of said current mirror circuit (34, 35) being connected to said reference cell (31); a constant current source (32) connected to a node (36) between said memory cells (30) and said current mirror circuit (34, 35).
Claim 8
Dependent Claim
19 words
A device according to claim 5 wherein said constant current source (52) is a depletion type MOS transistor (52).
Claim 9
Dependent Claim
48 words
A device according to claim 5 wherein an inverter (57) connected to said node (56) amplifies the potential at said node (56), and a input terminal and a output terminal of said inverter (57) are connected each other by a switching means (58) before a data outputting operation.