EP0411904A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Processor condition sensing circuits, systems and methods
Assignee: Texas Instruments Inc
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Filing: 1990-07-31
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Granted: —
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Expires: 2010-07-31
Abstract
Abstract A data processing device 11 comprising an electronic processor 1873, a sensor 1877 and a peripheral 1871 used for system sensing, testing, and emulation. In one embodiment of the invention, the sensor is on-chip with and capable of analyzing the operations of the processor. In another embodiment, the sensor is capable of temporarily suspending operation of the processor if the processor interrogates a missing peripheral. The sensor then answers the processor as would have the peripheral if present. In other embodiments of the invention, the peripheral is on-chip with the processor and a means is provided for entering data into and independently starting and stopping both the processor and the peripheral in an emulation mode of operation. The means is further described as comprising a serial scan testability interface 1981 of at least two scan paths.
Inventors
- 👤 Gary L Swoboda
- 👤 Peter Ehlig
- 👤 Martin D. Daniels
- 👤 Joseph A. Coomes
- 👤 Reid E. Tatge
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 12:41
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/362; G06F11/3648; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3185; G01R31/318533; G01R31/318536; G06F11/22; G06F11/2289; G06F11/26; G06F11/261; G06F8/00; G06F8/40; G06F8/41; G01R31/318505; G06F11/006; G06F11/273; G06F11/2733; G06F11/30; G06F11/32; G06F11/34
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
28 words
A data processing device comprising: a semiconductor chip; an electronic processor on-chip; and an on-chip condition sensor connected to said electronic processor for analysis of the operations thereof.
Claim 2
Dependent Claim
28 words
A data processing device comprising: a semiconductor chip; an electronic processor on-chip; and an on-chip condition sensor connected to said electronic processor for analysis of the operations thereof.
Claim 3
Dependent Claim
16 words
The device of Claim 1 wherein said on-chip condition sensor includes a program address breakpoint circuit.
Claim 4
Dependent Claim
16 words
The device of Claim 1 wherein said on-chip condition sensor includes a data address breakpoint circuit.
Claim 5
Dependent Claim
27 words
The device of Claim 1 wherein said electronic processor includes a program counter, and said on-chip condition sensor includes a trace stack connected to said program counter.
Claim 6
Dependent Claim
15 words
The device of Claim 4 wherein said on-chip condition sensor includes a trace stack-full sensor.
Claim 7
Dependent Claim
117 words
A data processing device for use with a host computer in development of apparatus under development including the data processing device and lacking a peripheral which is to be provided later, the data processing device comprising: an electronic processor operable to generate a first signal to access the peripheral, to which the peripheral when present would reply with a second signal; a sensing circuit connected to said electronic processor operable to temporarily suspend operations of said electronic processor when the first signal is sensed; and an interface to the electronic processor connectible to the host computer for supplying the second signal to said electronic processor in response to said host computer simulating an access of said peripheral.
Claim 8
Dependent Claim
117 words
A data processing device for use with a host computer in development of apparatus under development including the data processing device and lacking a peripheral which is to be provided later, the data processing device comprising: an electronic processor operable to generate a first signal to access the peripheral, to which the peripheral when present would reply with a second signal; a sensing circuit connected to said electronic processor operable to temporarily suspend operations of said electronic processor when the first signal is sensed; and an interface to the electronic processor connectible to the host computer for supplying the second signal to said electronic processor in response to said host computer simulating an access of said peripheral.
Claim 9
Dependent Claim
29 words
The data processing device of Claim 6 wherein said interface includes a serial scan interface and said processor, sensing circuit, and scan interface are integrated on a semiconductor chip.
Claim 10
Dependent Claim
61 words
A data processing device formed in a single semiconductor chip comprising: an electronic processor, and on-chip peripheral circuitry ordinarily operative together; and means for selectively entering externally supplied data into the electronic processor and on-chip peripheral circuitry and starting and stopping operations of the electronic processor and the on-chip peripheral circuitry independently of each other in an emulation mode of operation.
Claim 11
Dependent Claim
61 words
A data processing device formed in a single semiconductor chip comprising: an electronic processor, and on-chip peripheral circuitry ordinarily operative together; and means for selectively entering externally supplied data into the electronic processor and on-chip peripheral circuitry and starting and stopping operations of the electronic processor and the on-chip peripheral circuitry independently of each other in an emulation mode of operation.
Claim 12
Dependent Claim
19 words
The data processing device of Claim 8 further comprising means for holding a digital representation of a stop mode.
Claim 13
Dependent Claim
50 words
The data processing device of Claim 9 wherein said means for selectively entering data includes means responsive to the digital representation for enabling said electronic processor to trap to a predetermined location as a non-maskable interrupt so that the processor continues to operate until a return from trap is reached.
Claim 14
Dependent Claim
47 words
The data processing device of Claim 9 wherein said electronic processor has a pipeline organization and said means for selectively entering data includes means responsive to the digital representation for enabling said electronic processor to cease instruction fetches and to execute all instructions currently in the pipeline.
Claim 15
Dependent Claim
34 words
An emulation device comprising: a serial scan testability interface having at least first and second scan paths; and state machine circuitry connected and responsive to said second scan path generally operable for emulation control.
Claim 16
Dependent Claim
34 words
An emulation device comprising: a serial scan testability interface having at least first and second scan paths; and state machine circuitry connected and responsive to said second scan path generally operable for emulation control.
Claim 17
Dependent Claim
26 words
The emulation device of claim 12 wherein said serial scan testability interface includes an instruction register, and scan path selection circuitry responsive to said instruction register.
Claim 18
Dependent Claim
36 words
The emulation device of claim 13 wherein said serial scan testability interface includes a separate state machine connected to control said instruction register and having a sequence of states responsive to an externally supplied digital signal.
References Cited (Backward Citations)
No citation records indexed.
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