Erasing procedure for memory cells, means for its implementation and its use in a powerless memory device

Abstract

Abstract The procedure for erasing an EEPROM memory cell according to the invention consists, at the start of each erasure operation, in switching on a counter in a RAM memory, in carrying out an erasure cycle as recommended by the constructor, and then a cycle of reading and comparing the voltage read with an expected voltage corresponding to the "erased" state of the memory cell, and then, if the voltage read is not the expected voltage, in incrementing the counter and operating a new erasure, reading and comparison cycle. When the voltage read is the expected voltage, a return code characteristic of the contents of the counter and hence of the number of erasure cycles which were required for the erasure operation is emitted, destined for the user. The procedure applies, in particular, to unpowered EEPROM memory devices of the chip card type. …<IMAGE>…

Inventors

• 👤 Augustin Farrugia
• 👤 Gérard Binguy

Bibliographic Details