EP0406698A2
Expired / Lapsed
EP
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Method and apparatus for correcting timing errors for a multi-picture display
Assignee: Technicolor USA Inc
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Filing: 1990-06-28
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Granted: —
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Expires: 2010-06-28
Abstract
Abstract A picture-in-a-picture television receiver displays a compound image which includes a compressed image derived from an auxiliary signal inset in a full-size image derived from a main signal. The auxiliary composite video signal is sampled (124,126) synchronous with a system clock signal that is burst locked to the main signal. The sampled data signal is separated (128) into luminance and color information component signals, which are subsampled (130) and stored in a field memory (136) synchronous with the system clock signal. The clock signal phase used for horizontal subsampling is determined at the start of each line to compensate for skew errors in the auxiliary signal. The luminance samples retrieved from the memory are applied to clock transfer circuitry (146) which resynchronizes the samples to a phase shifted version of the system clock signal to compensate for skew errors in the main signal. The phase shifted (142) clock signal is synchronized to the horizontal scanning signals used to display the compound image. The color information component signals (150) are not resynchronized to the phase shifted clock signal. The component signals of the compressed image are combined (154) to form a composite signal having color information that is synchronized to the main signal. The compressed signal is substituted (114) for a portion of the main signal to generate a signal representing the compound image.
Inventors
- 👤 Donald Henry Willis
- 👤 Barth Alan Canfield
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 23:40
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/44; H04N5/445; H04N5/45; H04N5/222; H04N5/262; H04N5/265
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
130 words
In a video signal processing system including a source of main video signal having a horizontal line synchronizing signal component and including memory means for holding sampled data representing a second video signal, apparatus for processing the sampled data in synchronism with said main video signal characterized by: means (140) for providing a clock signal; means (132) for retrieving said sampled data from said memory means (136) in synchronism with said clock signal; means (142) for shifting the phase of said clock signal to generate a phase shifted clock signal that is substantially aligned with said horizontal line synchronizing signal; and clock transfer means (146), responsive to said phase shifted clock signal, for providing said sampled data, retrieved from said memory means, in synchronism with said phase shifted clock signal.
Claim 2
Dependent Claim
130 words
In a video signal processing system including a source of main video signal having a horizontal line synchronizing signal component and including memory means for holding sampled data representing a second video signal, apparatus for processing the sampled data in synchronism with said main video signal characterized by: means (140) for providing a clock signal; means (132) for retrieving said sampled data from said memory means (136) in synchronism with said clock signal; means (142) for shifting the phase of said clock signal to generate a phase shifted clock signal that is substantially aligned with said horizontal line synchronizing signal; and clock transfer means (146), responsive to said phase shifted clock signal, for providing said sampled data, retrieved from said memory means, in synchronism with said phase shifted clock signal.
Claim 3
Dependent Claim
45 words
The apparatus set forth in Claim 1 wherein said main video signal includes a color reference burst signal component and characterized in that the means for providing said clock signal includes means for locking said clock signal in phase to said color reference burst signal.
Claim 4
Dependent Claim
99 words
The apparatus set forth in Claim 1 characterized in that said clock phase shifting means includes: means, responsive to said clock signal for generating a plurality of clock phase signals wherein each of said plurality of clock phase signals has a respectively different phase relationship with said clock signal; and signal phase alignment means, coupled to receive said horizontal line synchronizing signal, for selecting one of said plurality of phase signals as said phase aligned clock signal, wherein said selected phase signal has a transition which occurs substantially concurrently with a predetermined transition of said horizontal line synchronizing signal.
Claim 5
Dependent Claim
87 words
The apparatus set forth in Claim 3 characterized in that said clock phase shifting means further includes: means for delaying said horizontal line synchronizing signal by an amount of time less than one period of said clock signal; and means, responsive to said phase aligned clock signal and to said delayed horizontal line synchronizing signal, for generating a reference signal which is delayed by an amount of time substantially equal to a predetermined amount of time relative to the predetermined transition of said horizontal line synchronizing signal.
Claim 6
Dependent Claim
97 words
The apparatus set forth in Claim 3 characterized in that said clock signal alternates between first and second states and said signal phase alignment means includes: means, responsive to the predetermined transition of said horizontal line synchronizing signal for storing sample values representing, respectively, the instantaneous states of said plurality of clock phase signals; means, responsive to one of said stored sample values having said first state and a next subsequent stored sample value having said second state for selecting the clock phase signal corresponding to said next subsequent sample value as said phase aligned clock signal.
Claim 7
Dependent Claim
75 words
The appratus set forth in Claim 5 characterized in that said signal phase alignment circuitry further includes means for selecting a first predetermined one of said clock phase signals as said phase aligned clock signal when all of said stored sample values have said first state and for selecting a second predetermined one of said clock phase signals as said phase aligned clock signal when all of said stored sample values have said second state.
Claim 8
Independent Claim
143 words
A method of aligning a periodic signal to a reference signal to provide an aligned periodic signal, characterized by the steps of: generating, from said periodic signal, a plurality of phase signals having respectively different phase relationships with said periodic signal; storing a plurality of sample values representing, respectively, instantaneous values of said plurality of phase signals occurring coincident with a predetermined transition of said reference signal; selecting one of said phase signals as said aligned periodic signal in accordance with a stored sample values indicating a transition in a corresponding phase signal occurring approximately coincident with the predetermined transition of said reference signal; and selecting a predetermined one of said phase signals as said aligned periodic signal when the stored sample values indicate no transition of any of the phase aligned signals occurring coincident with the predetermined transition of said reference signal.
Claim 9
Independent Claim
143 words
A method of aligning a periodic signal to a reference signal to provide an aligned periodic signal, characterized by the steps of: generating, from said periodic signal, a plurality of phase signals having respectively different phase relationships with said periodic signal; storing a plurality of sample values representing, respectively, instantaneous values of said plurality of phase signals occurring coincident with a predetermined transition of said reference signal; selecting one of said phase signals as said aligned periodic signal in accordance with a stored sample values indicating a transition in a corresponding phase signal occurring approximately coincident with the predetermined transition of said reference signal; and selecting a predetermined one of said phase signals as said aligned periodic signal when the stored sample values indicate no transition of any of the phase aligned signals occurring coincident with the predetermined transition of said reference signal.
Claim 10
Dependent Claim
215 words
In a video signal processing system including a source of main video signal having a horizontal line synchronizing signal component and a reference burst signal component, including a source of auxiliary video signal having at least a horizontal line synchronizing component and a luminance component, apparatus for synchronizing said luminance component with said main video signal characterized by; means (140) for generating a clock signal synchronized with said reference burst signal component of said main video signal; means (124,126), responsive to said auxiliary video signal and said clock signal, for providing samples of said auxiliary video signal synchronous with said clock signal; means (134) including memory means (136), couples to said means for providing samples, for writing said samples of said auxiliary video signal to, and reading said samples of said auxiliary video signal from said memory means synchronous with said clock signal; means (142), responsive to said clock signal and the horizontal synchronizing signal component of said main video signal, for generating a phase shifted clock signal having transitions in a predetermined relationship with a transition of said horizontal synchronizing signal component; and transfer means (146), coupled to said memory means, for providing the luminance component of said auxiliary video signal samples read from said memory means synchronized with said phase shifted clock signal.
Claim 11
Dependent Claim
215 words
In a video signal processing system including a source of main video signal having a horizontal line synchronizing signal component and a reference burst signal component, including a source of auxiliary video signal having at least a horizontal line synchronizing component and a luminance component, apparatus for synchronizing said luminance component with said main video signal characterized by; means (140) for generating a clock signal synchronized with said reference burst signal component of said main video signal; means (124,126), responsive to said auxiliary video signal and said clock signal, for providing samples of said auxiliary video signal synchronous with said clock signal; means (134) including memory means (136), couples to said means for providing samples, for writing said samples of said auxiliary video signal to, and reading said samples of said auxiliary video signal from said memory means synchronous with said clock signal; means (142), responsive to said clock signal and the horizontal synchronizing signal component of said main video signal, for generating a phase shifted clock signal having transitions in a predetermined relationship with a transition of said horizontal synchronizing signal component; and transfer means (146), coupled to said memory means, for providing the luminance component of said auxiliary video signal samples read from said memory means synchronized with said phase shifted clock signal.
Claim 12
Dependent Claim
78 words
The apparatus set forth in Claim 8 wherein said auxiliary video signal component further includes a reference burst signal component and chrominance signal components, and said apparatus further characterized by: means coupled to said means for providing samples of said auxiliary video signal, for separating said luminance signal component and said chrominance signal component, and for demodulating said chrominance signal components; means for coupling said separated luminance and demodulated chrominance signal components to said means including memory means.
Claim 13
Dependent Claim
40 words
The apparatus set forth in Claim 9 further characterized by means coupled to said memory means and said transfer means for combining chrominance signal components read from said memory means with a luminance signal component provided by said transfer means.
Claim 14
Dependent Claim
52 words
The apparatus set forth in Claim 10 characterized in that said means for combining chrominance signal components read from said memory means with a luminance signal provided by said transfer means includes means for modulating said demodulated chrominance signal components synchronous with said reference burst signal component of said main video signal.
Claim 15
Dependent Claim
39 words
The apparatus set forth in Claim 9 characterized in that said means for separating said luminance signal component and said chrominance signal components further includes means for providing a subsampled luminance signal component and subsampled demodulated chrominance signal components.
Claim 16
Dependent Claim
83 words
The apparatus set forth in Claim 8 characterized in that said means for separating a phase shifted clock signal includes: means, responsive to said clock signal for generating a plurality of respectively delayed representations of said signal; and signal phase alignment means, responsive to said horizontal synchronizing signal component of said main video signal, for selecting one of said plurality of delayed representations of said clock signal having a transition in a predetermined relationship with a transition of said horizontal synchronizing signal component.
Claim 17
Dependent Claim
33 words
The apparatus set forth in Claim 8 further characterized by means for substituting said luminance component of said auxiliary video signal provided by said transfer means for portions of said main video signal.
References Cited (Backward Citations)
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