Bidirectional transceiver for high speed data system

Claim 2

A transceiver circuit for use in a high speed data transmission network and for simultaneously receiving and transmitting data over a coaxial conductor comprising: a transmitter section for supplying a transmitted data signal; an impedance network receiving said transmitted data signal and a received data signal over said coaxial conductor and providing a cancelling signal output having a component of said transmitted data signal and a combined signal output having a component of said transmitted data signal and said received data signal; and, a receiver section comprising a high speed subtracting circuit receiving said cancelling signal output and said combined signal output and providing said received data signal as an output.

Claim 3

The transceiver circuit of claim 1, further comprising: a first equalizing means receiving said transmitted data signal from said transmitter section and providing an equalized transmitted data signal to said impedance network; and, a second equalizing means for receiving said received data signal from said subtracting circuit and providing an equalized received data signal.

Claim 4

The transceiver circuit of claim 2, wherein said high sped subtracting circuit includes a single stage subtracting transistor.

Claim 5

The transceiver circuit of claim 3, wherein said subtracting transistor has a small capacitance between its base and collector junction.

Claim 6

The transceiver circuit of claim 4, wherein said high speed data transmission network is a fiber optic data transmission network.

Claim 7

The transceiver circuit of claim 1, wherein said high speed subtracting circuit includes a single subtracting transistor.

Claim 8

The transceiver circuit of claim 6, wherein said subtracting transistor has a small capacitance between its base and collector junction.

Claim 9

The transceiver circuit of claim 7, wherein said high speed data transmission network is a fiber optic data transmission network.

Claim 10

The transceiver circuit of claim 1, wherein said high speed data transmission network is a fiber optic data transmission network.

Claim 11

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a coaxial conductor comprising: a transmitter section for supplying a transmitted data signal; an impedance network receiving said transmitted data signal and a received data signal over said coaxial conductor and providing a cancelling signal output having a component of said transmitted data signal and a combined signal output having a component of said transmitted data signal and said received data signal; a receiver section comprising a high speed single stage subtracting transistor receiving said cancelling signal output and said combined signal output and providing said received data signal as an output; a first equalizing means receiving said transmitted data signal from said transmitter section and providing an equalized transmitted data signal to said impedance network; and, a second equalizing means for receiving said received data signal from said subtracting transistor and providing an equalized received data signal.

Claim 12

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a coaxial conductor comprising: a transmitter section for supplying a transmitted data signal; an impedance network receiving said transmitted data signal and a received data signal over said coaxial conductor and providing a cancelling signal output having a component of said transmitted data signal and a combined signal output having a component of said transmitted data signal and said received data signal; a receiver section comprising a high speed single stage subtracting transistor receiving said cancelling signal output and said combined signal output and providing said received data signal as an output; a first equalizing means receiving said transmitted data signal from said transmitter section and providing an equalized transmitted data signal to said impedance network; and, a second equalizing means for receiving said received data signal from said subtracting transistor and providing an equalized received data signal.

Claim 13

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a first and second twisted pair of conductors comprising: a transmitter section for supplying an intermediate transmitted data signal; a first equalizing means for receiving said intermediate transmitted data signal and providing an equalized transmitted data signal; first balancing means for receiving said equalized transmitted data signal and for providing a balanced data signal to said first twisted pair; second balancing means for receiving a balanced data signal transmitted over said second twisted pair and providing a first output having a reference voltage and a second output having an intermediate received data signal; a high speed subtracting circuit receiving said first output and said second output and providing a received data signal characteristic of said balanced data signal; and, a second equalizing means for receiving said received data signal from said subtracting circuit and providing an equalized received data signal.

Claim 14

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a first and second twisted pair of conductors comprising: a transmitter section for supplying an intermediate transmitted data signal; a first equalizing means for receiving said intermediate transmitted data signal and providing an equalized transmitted data signal; first balancing means for receiving said equalized transmitted data signal and for providing a balanced data signal to said first twisted pair; second balancing means for receiving a balanced data signal transmitted over said second twisted pair and providing a first output having a reference voltage and a second output having an intermediate received data signal; a high speed subtracting circuit receiving said first output and said second output and providing a received data signal characteristic of said balanced data signal; and, a second equalizing means for receiving said received data signal from said subtracting circuit and providing an equalized received data signal.

Claim 15

The transceiver circuit of claim 11 further comprising a first resistor for receiving said equalized transmitted data signal and providing an impedance substantially the same as the impedance of said first twisted pair to said first balancing means.

Claim 16

The transceiver circuit of claim 12 further comprising second and third resistors coupled with the said first balancing means output and said second balancing means output respectively for providing a terminating impedance substantially the same as the impedance of said second twisted pair to said balancing means.

Claim 17

The transceiver circuit of claim 13 wherein said first balancing means comprises a first transformer.

Claim 18

The transceiver circuit of claim 14 wherein said second balancing means comprises a second transformer.

Claim 19

The transceiver circuit of claim 11 wherein said high speed subtracting circuit comprises a single stage transistor.

Claim 20

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a first and second twisted pair of conductors comprising: a transmitter section for supplying an intermediate transmitted data signal; a first equalizing means for receiving said intermediate transmitted data signal and providing an equalized transmitted data signal; a first transformer for receiving said equalized transmitted data signal and for providing a first balanced data signal first to said first twisted pair; a second transformer for receiving a second balanced data signal transmitted over said second twisted pair and providing a first output having a reference voltage and a second output having an intermediate received data signal; a single stage subtracting transistor receiving said first output and said second output and providing a received data signal characteristic of said balanced data signal transmitted over said second twisted pair as an output; and, a second equalizing means for receiving said received data signal from said transistor output and providing an equalized received data signal.

Claim 21

A transceiver circuit for use in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over a first and second twisted pair of conductors comprising: a transmitter section for supplying an intermediate transmitted data signal; a first equalizing means for receiving said intermediate transmitted data signal and providing an equalized transmitted data signal; a first transformer for receiving said equalized transmitted data signal and for providing a first balanced data signal first to said first twisted pair; a second transformer for receiving a second balanced data signal transmitted over said second twisted pair and providing a first output having a reference voltage and a second output having an intermediate received data signal; a single stage subtracting transistor receiving said first output and said second output and providing a received data signal characteristic of said balanced data signal transmitted over said second twisted pair as an output; and, a second equalizing means for receiving said received data signal from said transistor output and providing an equalized received data signal.