EP0405138A2
Expired / Lapsed
EP
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Insulated gate bipolar transistor and method of making the same
Assignee: Mitsubishi Electric Corp
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Filing: 1990-05-23
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Granted: —
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Expires: 2010-05-23
Abstract
Abstract In an IGBT having a plurality of source regions (5) formed in a base region (4), the spacing (D) between the source regions (5) is adapted to be larger than twice the channel length (L). A high concentration region (14) can be formed in at least a portion of the base region (4) between the source regions (5) independently from the above measure. Other IGBTs are further disclosed: A 500-750 V IGBT having a channel width per unit area ranging from 140 cm-1 to 280 cm-1, a 1000-1500 V IGBT having a channel width per unit area ranging from 70 cm-1 to 150 cm-1, and a stripe cell IGBT having a source region (5) formed in only one side of the base region (4).
Inventors
- 👤 Hiroyasu C/O Mitsubishi Denki K.K. Hagino
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 02:30
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D12/00; H10D12/411; H10D12/441; H10D62/124; H10D62/126; H10D62/127
Claims Analysis
Total Claims: 39
Claim 1
Independent Claim
239 words
An insulated gate bipolar transistor, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a plurality of second conductivity type second semiconductor regions (5) selectively formed in a surface of the first semiconductor region (4), - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5) satisfying the relation D > 2L; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 2
Dependent Claim
239 words
An insulated gate bipolar transistor, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a plurality of second conductivity type second semiconductor regions (5) selectively formed in a surface of the first semiconductor region (4), - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5) satisfying the relation D > 2L; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 3
Dependent Claim
45 words
The insulated gate bipolar transistor in accordance with claim 1, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel, and - the first semiconductor region (4) has a stripe configuration and is provided for each of the cells.
Claim 4
Dependent Claim
39 words
The insulated gate bipolar transistor in accordance with claim 1 or 2, wherein the distance D and a thickness X of the second semiconductor layer (2, 3) under the first semiconductor region (4) satisfies the relation D < 2X.
Claim 5
Dependent Claim
82 words
The insulated gate bipolar transistor in accordance with any of claims 1 to 3, further comprising: - a first conductivity type high concentration region (14) formed at least in a portion of the surface of the first semiconductor region (4) between the second semiconductor regions (5), having an impurity concentration sufficiently higher than the first semiconductor region (4), being closer to an end portion of the first semiconductor region (4) than the second semiconductor regions (5) between the second semiconductor regions (5).
Claim 6
Dependent Claim
80 words
The insulated gate bipolar transistor in accordance with any of claims 1 to 4, wherein - the insulated gate bipolar transistor has a breakdown voltage of about 500 to 750 Volt, and - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹.
Claim 7
Dependent Claim
80 words
The insulated gate bipolar transistor in accordance with any of claims 1 to 4, wherein - the insulated gate bipolar transistor has a breakdown voltage of about 1000 to 1500 Volt, and - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150 cm⁻¹.
Claim 8
Dependent Claim
43 words
The insulated gate bipolar transistor in accordance with any of claims 1 to 6, further comprising: a plurality of second conductivity type third semiconductor regions (2a) intermittently formed in the first semiconductor layer (1a) so as to penetrate the first semiconductor layer (1a).
Claim 9
Dependent Claim
259 words
An insulated gate bipolar transistor, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a plurality of second conductivity type second semiconductor regions (5) selectively formed in a surface of the first semiconductor region (4), - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a first conductivity type high concentration region (14) formed at least in a portion of the surface of the first semiconductor region (4) between the second semiconductor regions (5), having an impurity concentration sufficiently higher than the first semiconductor region (4), being closer to an end portion of the first semiconductor region (4) than the second semiconductor regions (5) between the second semiconductor regions (5); - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 10
Dependent Claim
259 words
An insulated gate bipolar transistor, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a plurality of second conductivity type second semiconductor regions (5) selectively formed in a surface of the first semiconductor region (4), - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a first conductivity type high concentration region (14) formed at least in a portion of the surface of the first semiconductor region (4) between the second semiconductor regions (5), having an impurity concentration sufficiently higher than the first semiconductor region (4), being closer to an end portion of the first semiconductor region (4) than the second semiconductor regions (5) between the second semiconductor regions (5); - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 11
Dependent Claim
57 words
The insulated gate bipolar transistor in accordance with claim 8, wherein - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5) satisfy the relation D > 2L.
Claim 12
Dependent Claim
249 words
The insulated gate bipolar transistor having a breakdown voltage of about 500 to 750 Volt, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1), - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5), and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 13
Dependent Claim
249 words
The insulated gate bipolar transistor having a breakdown voltage of about 500 to 750 Volt, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1), - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3), - a second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5), and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 14
Dependent Claim
57 words
The insulated gate bipolar transistor in accordance with claim 10, wherein - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5) satisfy the relation D > 2L.
Claim 15
Dependent Claim
85 words
The insulated gate bipolar transistor in accordance with claim 10 or 11, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel, - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells, and - only a part of an outer end of the surface of the second semiconductor region (5) lies in the peripheral portion of the first semiconductor region (4).
Claim 16
Dependent Claim
77 words
The insulated gate bipolar transistor in accordance with claim 10 or 11, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel; - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells; and - the second semiconductor region (5) is provided in only a part of the plurality of first semiconductor regions (4).
Claim 17
Dependent Claim
39 words
The insulated gate bipolar transistor in accordance with claim 13, wherein - only a part of an outer end of the surface of the second semiconductor region (5) lies in the peripheral portion of the first semiconductor region (4).
Claim 18
Dependent Claim
80 words
The insulated gate bipolar transistor in accordance with claim 10 or 11, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel; - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells; and - the second semiconductor region (5) is provided in only a half side of each of the plurality of first semiconductor regions (4).
Claim 19
Dependent Claim
248 words
An insulated gate bipolar transistor having a breakdown voltage of about 1000 to 1500 Volt, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3); - a second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150cm⁻¹; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 20
Dependent Claim
248 words
An insulated gate bipolar transistor having a breakdown voltage of about 1000 to 1500 Volt, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a first conductivity type first semiconductor region (4) selectively formed in a surface of the second semiconductor layer (3); - a second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150cm⁻¹; - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 21
Dependent Claim
57 words
The insulated gate bipolar transistor in accordance with claim 16, wherein - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5) satisfy the relation D > 2L.
Claim 22
Dependent Claim
85 words
The insulated gate bipolar transistor in accordance with claim 16 or 17, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel; - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells; and - only a part of an outer end of the surface of the second semiconductor region (5) lies in the peripheral portion of the first semiconductor region (4).
Claim 23
Dependent Claim
77 words
The insulated gate bipolar transistor in accordance with claim 16 or 17, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel; - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells; and - the second semiconductor region (5) is provided in only a part of the plurality of first semiconductor regions (4).
Claim 24
Dependent Claim
38 words
The insulated gate bipolar transistor in accordance with claim 19, wherein - only part of an outer end of the surface of the second semiconductor region (5) lies in the peripheral portion of the first semiconductor region (4).
Claim 25
Dependent Claim
80 words
The insulated gate bipolar transistor in accordance with claim 16 or 17, wherein - the insulated gate bipolar transistor consists of a plurality of cells connected in parallel; - the first semiconductor region (4) includes a plurality of first semiconductor regions (4) having a polygonal configuration each of which is provided for each of the cells; and - the second semiconductor region (5) is provided in only a half side of each of the plurality of first semiconductor regions (4).
Claim 26
Dependent Claim
214 words
An insulated gate bipolar transistor consisting of a plurality of cells connected in parallel, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a stripe-shaped first conductivity type first semiconductor region (4) for each cell selectively formed in a surface of the second semiconductor layer (3); a stripe-shaped second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4) in only one side of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 27
Dependent Claim
214 words
An insulated gate bipolar transistor consisting of a plurality of cells connected in parallel, comprising: - a first conductivity type first semiconductor layer (1) having first and second major surfaces; - a second conductivity type second semiconductor layer (2, 3) formed on the first major surface of the first semiconductor layer (1); - a stripe-shaped first conductivity type first semiconductor region (4) for each cell selectively formed in a surface of the second semiconductor layer (3); a stripe-shaped second conductivity type second semiconductor region (5) selectively formed in a surface of the first semiconductor region (4) in only one side of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - an insulation film (7) formed on the channel region (6); - a control electrode (8) formed on the insulation film (7); - a first main electrode (9) formed on the first and second semiconductor regions (4, 5); and - a second main electrode (10) formed on the second major surface of the first semiconductor layer (1).
Claim 28
Dependent Claim
76 words
The insulated gate bipolar transistor in accordance with claim 22, wherein - the insulated gate bipolar transistor has a breakdown voltage of about 500 to 750 Volt; and - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹.
Claim 29
Dependent Claim
76 words
The insulated gate bipolar transistor in accordance with claim 22, wherein - the insulated gate bipolar transistor has a breakdown voltage of about 1000 to 1500 Volt; and - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150 cm⁻¹.
Claim 30
Independent Claim
247 words
A method of fabricating an insulated gate bipolar transistor, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a plurality of second conductivity type second semiconductor regions (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation D > 2L; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 31
Independent Claim
247 words
A method of fabricating an insulated gate bipolar transistor, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a plurality of second conductivity type second semiconductor regions (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation D > 2L; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 32
Dependent Claim
85 words
The method of fabricating an insulated gate bipolar transistor in accordance with claim 25, further comprising the step of: - forming a first conductivity type high concentration region (14) at least in a portion of the surface of the first semiconductor region (4) between the second semiconductor regions (5). having an impurity concentration sufficiently higher than the first semiconductor region (4), being closer to an end portion of the first semiconductor region (4) than the second semiconductor regions (5) between the second semiconductor regions (5).
Claim 33
Independent Claim
257 words
A method of fabricating an insulated gate bipolar transistor having a breakdown voltage of about 500 to 750 Volt, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a second conductivity type second semiconductor region (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 34
Independent Claim
257 words
A method of fabricating an insulated gate bipolar transistor having a breakdown voltage of about 500 to 750 Volt, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a second conductivity type second semiconductor region (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 140 cm⁻¹ ≦ W U ≦ 280 cm⁻¹; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 35
Independent Claim
257 words
A method of fabricating an insulated gate bipolar transistor having a breakdown voltage of about 1000 to 1500 Volt, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a second conductivity type second semiconductor region (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150 cm⁻¹; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 36
Independent Claim
257 words
A method of fabricating an insulated gate bipolar transistor having a breakdown voltage of about 1000 to 1500 Volt, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - forming a second conductivity type second semiconductor region (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4), in a peripheral portion of the first semiconductor region (4), near a portion of the surface of the first semiconductor region (4) between ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a value W U per unit area of a width of the channel region (6), which is defined as a length along opposite ends of the surfaces of the first and second semiconductor regions (4, 5), satisfying the relation 70 cm⁻¹ ≦ W U ≦ 150 cm⁻¹; - forming an insulation film (7) on the channel region (6); - forming a control electrode (8) on the insulation film (7); - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 37
Independent Claim
290 words
A method of fabricating an insulated gate bipolar transistor, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces ; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming an insulation film (70) on the second semiconductor layer; - forming a control electrode (80) on the insulation film (70); - selectively removing the control electrode (80) and the insulation film (70) to open a window (90); - implanting first conductivity type impurities in the second semiconductor layer (3) through the window (90) to form a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - selectively implanting second conductivity type impurities in the first semiconductor region (4) to form a plurality of second conductivity type second semiconductor regions (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4) near a portion of the surface of the first semiconductor region (4) under the gate electrode between outer ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the outer ends of the surfaces of the first and second semiconductor regions (4, 5) satisfying the relation D > 2L; - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 38
Independent Claim
290 words
A method of fabricating an insulated gate bipolar transistor, comprising the steps of: - preparing a first conductivity type first semiconductor layer (1) having first and second major surfaces ; - forming a second conductivity type second semiconductor layer (2, 3) on the first major surface of the first semiconductor layer (1); - forming an insulation film (70) on the second semiconductor layer; - forming a control electrode (80) on the insulation film (70); - selectively removing the control electrode (80) and the insulation film (70) to open a window (90); - implanting first conductivity type impurities in the second semiconductor layer (3) through the window (90) to form a first conductivity type first semiconductor region (4) selectively in a surface of the second semiconductor layer (3); - selectively implanting second conductivity type impurities in the first semiconductor region (4) to form a plurality of second conductivity type second semiconductor regions (5) selectively in a surface of the first semiconductor region (4); - a portion of the first semiconductor region (4) near a portion of the surface of the first semiconductor region (4) under the gate electrode between outer ends of surfaces of the first and second semiconductor regions (4, 5) being defined as a channel region (6); - a distance D between the second semiconductor regions (5) and a length L of the channel region (6) which is defined as a distance between the outer ends of the surfaces of the first and second semiconductor regions (4, 5) satisfying the relation D > 2L; - forming a first main electrode (9) on the first and second semiconductor regions (4, 5); and - forming a second main electrode (10) on the second major surface of the first semiconductor layer (1).
Claim 39
Dependent Claim
57 words
The method of fabricating an insulated gate bipolar transistor in accordance with claim 29 wherein - the step of forming a second conductivity type second semiconductor layer (2. 3) comprises the steps of preparing a second conductivity type second semiconductor layer (2, 30) and attaching the second semiconductor layer (2, 30) to the first semiconductor layer (1).
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