EP0405042A1
Expired / Lapsed
EP
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High speed digital packet switching system
Assignee: International Business Machines Corp
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Filing: 1989-06-29
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Granted: —
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Expires: 2009-06-29
Abstract
Abstract A 3-stage switching system is provided for generating, i.e. finding, reserving and setting, path from one switch entrance port (1) to at least one switch exit port (transmit side) for asynchronously received and buffered data cells. While an Nth cell is being transferred, control means (36) generate a control word including the switch exit port address for cell (N+1)th to be subsequently transferred. Said control word is used to find and reserve a path through the switch on a stage-by-stage basis, and then set said path, if any, using a fed back acknowledgement. The (N+1)th cell path generation is performed during cell N transfer, on a cycle stealing basis.
Inventors
- 👤 Gérald Lebizay
- 👤 Michel Charles Demange
- 👤 Alain Vedrenne
- 👤 Andrzej Milewski
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 07:44
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L49/00; H04L49/15; H04L49/1553; H04L49/20; H04L49/201; H04L49/203; H04L49/25; H04L49/253; H04L49/255; H04L2012/5638; H04L2012/5646; H04L2012/5651; H04L2012/5678; H04L2012/5681
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
152 words
A high speed digital packet switching system for transferring asynchronously received data cells, from one multistage switch entrance port to at least one cell destination dependent switch exit port, said system including : - receive buffering means for buffering asynchronously received data cells; and, - control means for progressively finding and setting the path for the (N + 1 )th cell to be transferred through said switch, while current Nth cell is being transferred, said control means including : - control word generating means for generating a control word including a cell destination address field and for feeding said field with (N+1)th cell destination data; - cycle stealing means; - path generating means sensitive to said cycle stealing means and to said control word means, for progressively finding, reserving and setting a path for the (N + )th data cell during the transfer of said Nth cell, on a cycle stealing basis.
Claim 2
Dependent Claim
152 words
A high speed digital packet switching system for transferring asynchronously received data cells, from one multistage switch entrance port to at least one cell destination dependent switch exit port, said system including : - receive buffering means for buffering asynchronously received data cells; and, - control means for progressively finding and setting the path for the (N + 1 )th cell to be transferred through said switch, while current Nth cell is being transferred, said control means including : - control word generating means for generating a control word including a cell destination address field and for feeding said field with (N+1)th cell destination data; - cycle stealing means; - path generating means sensitive to said cycle stealing means and to said control word means, for progressively finding, reserving and setting a path for the (N + )th data cell during the transfer of said Nth cell, on a cycle stealing basis.
Claim 3
Dependent Claim
36 words
A high speed digital packet switching system according to claim 1 wherein said data cell includes an information section and a header section, whereby said control word destination address is derived from said cell header section.
Claim 4
Dependent Claim
88 words
A high speed digital packet switching system according to claim 1 or 2 wherein said cycle stealing means include: - means for repetitively stealing Nth cell transfer processing cycles; - means sensitive to said cycle stealing occurrence for triggering said (N + 1 )th path generating means at each cycle stealing occurrence; and, - means for neutralizing, within the Nth cell transfer processing, subsequent cycle stealing for cell (N + 1 )th path setting after finding a path, unless broadcasting (N + 1 )th cell is being required.
Claim 5
Dependent Claim
60 words
A high speed digital packet switching system according to claim 3 wherein said control means include means for inserting an acknowledgement (ACK) data into said control word upon finding a switch path for said (N+1)th cell transfer, and means for feeding said acknowledgement back to the switch entrance port for said (N+1)th cell, whereby said found path is being set.
Claim 6
Dependent Claim
103 words
A high speed digital switching system according to claim 4, wherein said multistage switch is a 3- stage switch, and said control means include : - coding means for differently coding acknowledgement data from stage 2 (NACK-2) and from stage 3 (NACK-3) upon failing to find free path in stage 2 or 3 respectively; - means for resuming path generating over stages 1 and 2, at next cycle stealing occurrence with same control word, upon said switch entrance port control means getting a NACK-2 back; or resuming said path generating operations with a different control word upon said control means getting a NACK-3.
Claim 7
Dependent Claim
113 words
A system according to claim 5 wherein said means for resuming path generating upon said entrance port control means getting a NACK-3 back, include: - means for scanning the cells enqueued into same receive buffer means and for sequentially comparing the buffered cells destination addresses with last failed (N + 1)th cell destination address; and, - means sensitive to said scanning means for neutralizing subsequent cycle steals during currently processed Nth cell upon said comparing failing to detect a buffered cell with a destination address different from failed (N+1)th cell, otherwise, holding currently investigated (N + 1 )th cell transfer path finding momentarily and resuming path finding process with a different enqueued cell.
Claim 8
Dependent Claim
63 words
A system according to claim 6 wherein said control means include: - means for routing the path finding control word within stage 1 by associating stage 1 entrance and exit ports to each other, according to a predefined scheme; and, - means for routing the path finding control word within stages 2 and 3 according to the destination address within said control word.
Claim 9
Dependent Claim
21 words
A system according to claim 7 wherein said predefined scheme is made to vary cyclically the stages exit to entrance associations.
Claim 10
Dependent Claim
56 words
A system according to claim 8 wherein said means for routing within stages 2 and 3 include means for resolving contention situations by providing a priority field within said control word and by inserting a priority data therein, said priority data being fixed for stage 3 and varying on a "round robin" basis for stage 2.
Claim 11
Dependent Claim
191 words
A system according to anyone of claim 5 through 9 wherein each of said switch stages includes modules, each module including : - a matrix of cross points PCi,j, wherein i = 1,...M and =1,...M respectively refer to matrix entrance and exit ports; - entrance controller means (CEi) connected to each module entrance port; - exit controller means (CSj) connected to each module exit port; - control means for feeding entrance controller means with said control word defining a stage exit port for data cell (N + 1) during transfer of Nth cell, said (N + 1 )th cell control word being to be transferred to said stage exit port; - control means connected to exit controller means for processing failing path determination if (N + 1 )st control word defined stage exit port is not free; - acknowledgement means connected to said control means for generating and feeding acknowledgement data back to concerned CEi, whereby said acknowledgement data either acknowledges finding a path through the stage for cell (N+1)st and reserves said path, or said acknowledgement data indicates busy path, whereby the path finding operations should be resumed later on.
References Cited (Backward Citations)
EP0183592A1
Cited
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