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EP0404369A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

A method for maintaining cache coherence in a multiprocessor computer system

Assignee: HP Inc
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Filing: 1990-05-30
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Granted: —
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Expires: 2010-05-30
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Abstract

Abstract A method is provided for maintaining cache coherence in a multiprocessor (12, 14, 16) computer system (10) having a potential for duplication of data in a plurality of storage locations, where there is cache (18, 20, 22) associated with each processor (12, 14, 16) by storing a processor address and a hint for each cache. More specifically, where the multiprocessor computer system (10) employs doubly-linked lists for identifying a previous master of the sharable data and a next master of the sharable data, the method includes the steps of 1) passing (42) the current address (44) of the current master (20) from the current master (20) to the previous master (28); 2) passing (42) the current address (46) of the current master (20) from the current master (20) to the next master (18); 3) passing (42) the current index (46) of the current master (20) from the current master (20) to the previous master (28) (the current index being a collection of all information needed by the current master (20) to find a coherence block); and 4) passing (42) the current index (46) of the current master (20) from the current master (20) to the next master (18).

Inventors

  • 👤 Ross V. La Fetra

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 15:47
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0817; G06F12/0824

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 179 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-­linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: passing (42) the current address (44) of a current master (20) from the current master (20) to the previous master (28), wherein the current address (44) is the location through which the current master (20) will respond; passing (42) the current address (44) of the current master (20) from the current master (20) to the next master (28); passing (42) the current index (46) of the current master (20) from the current master (20) to the previous master (28), wherein the current index (46) is a collection of information needed by the current master (20) to use the coherence block; and passing the current index (46) of the current master (20) from the current master (20) to the next master (28).
Claim 2
Independent Claim 179 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-­linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: passing (42) the current address (44) of a current master (20) from the current master (20) to the previous master (28), wherein the current address (44) is the location through which the current master (20) will respond; passing (42) the current address (44) of the current master (20) from the current master (20) to the next master (28); passing (42) the current index (46) of the current master (20) from the current master (20) to the previous master (28), wherein the current index (46) is a collection of information needed by the current master (20) to use the coherence block; and passing the current index (46) of the current master (20) from the current master (20) to the next master (28).
Claim 3
Dependent Claim 25 words
The method according to claim 1 wherein said current address (44) and said current index (46) are passed simultaneously (43) as part of a transaction.
Claim 4
Dependent Claim 48 words
The method according to claim 1 wherein said plurality of memory locations include one central memory system (28) for containing a valid copy of all data and at least two cache memories (18, 20), each one of said cache memories being associated with its own processor (12, 14).
Claim 5
Dependent Claim 92 words
The method according to claim 3 wherein each cache memory (18, 20) is for storing at least a portion of said coherence block of data, each said coherence block of data having associated therewith a tag (76, 51) indicative of the presence of valid data and invalid data, a slot (68, 52) for storing said current address (44) of said previous master and said current index of said previous master, and a slot (62, 50) for storing said current address of said next master and said current index of said next master.
Claim 6
Independent Claim 353 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-linked lists for identifying a previous master (20) of said data and a next master (18) of said data, said method comprising the steps of: a) issuing from a first master (18) a first transaction (58) to a second master (28) requesting sharable data in a coherence block from said second master, said second master being a repository of known valid data, said first transaction including at least an address of the requested coherence block, a first master address for said first master and a first index useful by said second master for indexing into addresses of the first master; b) storing (60) a second master address of said second master and a second index of said second master in a previousmaster storage location (68) of said first master, thereby to indicate the previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction (66) containing at least a portion of the sharable data and at least a third master address and a third index of a third master (20) from a nextmaster storage location (31) of said second master: thereafter d) storing said first master address and said first index in said nextmaster storage location (34) of said second master, thereby to indicate the next link (64) of said second master; e) storing said third master address and said third index in a nextmaster storage location (64) of said first master, thereby to indicate the next link (49) of said first master; thereafter f) issuing from said first master to said third master a third transaction (66) containing said first master address and said first index; g) storing said first master address and said first index in a previousmaster storage location (52) of said third master; and h) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers (74).
Claim 7
Independent Claim 353 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-linked lists for identifying a previous master (20) of said data and a next master (18) of said data, said method comprising the steps of: a) issuing from a first master (18) a first transaction (58) to a second master (28) requesting sharable data in a coherence block from said second master, said second master being a repository of known valid data, said first transaction including at least an address of the requested coherence block, a first master address for said first master and a first index useful by said second master for indexing into addresses of the first master; b) storing (60) a second master address of said second master and a second index of said second master in a previousmaster storage location (68) of said first master, thereby to indicate the previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction (66) containing at least a portion of the sharable data and at least a third master address and a third index of a third master (20) from a nextmaster storage location (31) of said second master: thereafter d) storing said first master address and said first index in said nextmaster storage location (34) of said second master, thereby to indicate the next link (64) of said second master; e) storing said third master address and said third index in a nextmaster storage location (64) of said first master, thereby to indicate the next link (49) of said first master; thereafter f) issuing from said first master to said third master a third transaction (66) containing said first master address and said first index; g) storing said first master address and said first index in a previousmaster storage location (52) of said third master; and h) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers (74).
Claim 8
Dependent Claim 37 words
The method according to claim 5 further including the step of tagging (76, 32, 51) each master (18, 28, 20) as containing valid data in a coherence block upon completion of said updating of addresses and indexes.
Claim 9
Dependent Claim 32 words
The method of claim 5 wherein said updating step h) includes acknowledging (72) from said third master to said first master completion of the request of said first master for sharable data.
Claim 10
Dependent Claim 27 words
The method according to claim 5 wherein said third master is said second master such that said step g) is carried out internally to said second master.
Claim 11
Independent Claim 323 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-linked lists for identifying a previous master (18) of said data and a next master (18) of said data, wherein a second master address and a second index are stored in a nextmaster storage location (34) of a second master (28), said method comprising the steps of: a) issuing from a first master (18) a first transaction (42) to said second master (28) requesting sharable data in a coherence block from said second master, said second master being a repository of known valid data, said first transaction including at least an address of the requested coherence block, a first master address for said first master and a first index useful by said second master for indexing into addresses of the first master; b) storing (60) said second master address of said second master and said second index of said second master in a previousmaster storage location (68) of said first master, thereby to indicate the previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction (48) containing at least a portion of the sharable data and at least said second master address and said second index from the nextmaster storage (34) location of said second master; thereafter d) storing said first master address and said first index in said nextmaster storage location of said second master, thereby to indicate the next link of said second master; e) storing said second master address and said second index in a nextmaster storage location (62) of said first master, thereby to indicate the next link of said first master; and thereafter f) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers.
Claim 12
Independent Claim 323 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system (10) employing doubly-linked lists for identifying a previous master (18) of said data and a next master (18) of said data, wherein a second master address and a second index are stored in a nextmaster storage location (34) of a second master (28), said method comprising the steps of: a) issuing from a first master (18) a first transaction (42) to said second master (28) requesting sharable data in a coherence block from said second master, said second master being a repository of known valid data, said first transaction including at least an address of the requested coherence block, a first master address for said first master and a first index useful by said second master for indexing into addresses of the first master; b) storing (60) said second master address of said second master and said second index of said second master in a previousmaster storage location (68) of said first master, thereby to indicate the previous link of said first master; thereafter c) issuing from said second master to said first master a second transaction (48) containing at least a portion of the sharable data and at least said second master address and said second index from the nextmaster storage (34) location of said second master; thereafter d) storing said first master address and said first index in said nextmaster storage location of said second master, thereby to indicate the next link of said second master; e) storing said second master address and said second index in a nextmaster storage location (62) of said first master, thereby to indicate the next link of said first master; and thereafter f) updating previous master addresses and indexes and next master addresses and indexes in selected linked masters to correct pointers.
Claim 13
Dependent Claim 31 words
The method according to claim 9 further including the step of tagging each master as containing valid data in a coherence block upon completion of said updating of addresses and indexes.
Claim 14
Independent Claim 235 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master (18) a first transaction (88) to a second master (28) informing of a purge of sharable data in a coherence block in said first master, said first transaction including a third master address for a third master (20) and a third index useful by said third master for indexing into addresses of the third master; thereafter b) storing said third master address and third index in a nextmaster storage location (34) of said second master, thereby to indicate a next link; c) issuing from said second master to said third master a second transaction (90), said second transaction containing a second master address and a second index of said second master; thereafter d) issuing from said third master to said first master a third transaction (92) acknowledging completion of said first transaction; thereafter e) storing said second master address and said second index in a previousmaster storage location (52) of said third master, thereby to indicate a previous link; and f) marking said coherence block (76) of said first master as invalid.
Claim 15
Independent Claim 235 words
A method for maintaining cache coherence in a multiprocessor computer system (10) having a potential for duplication of data in a plurality of storage locations identifiable as coherence blocks, said multiprocessor computer system employing doubly-linked lists for identifying a previous master of said data and a next master of said data, said method comprising the steps of: a) issuing from a first master (18) a first transaction (88) to a second master (28) informing of a purge of sharable data in a coherence block in said first master, said first transaction including a third master address for a third master (20) and a third index useful by said third master for indexing into addresses of the third master; thereafter b) storing said third master address and third index in a nextmaster storage location (34) of said second master, thereby to indicate a next link; c) issuing from said second master to said third master a second transaction (90), said second transaction containing a second master address and a second index of said second master; thereafter d) issuing from said third master to said first master a third transaction (92) acknowledging completion of said first transaction; thereafter e) storing said second master address and said second index in a previousmaster storage location (52) of said third master, thereby to indicate a previous link; and f) marking said coherence block (76) of said first master as invalid.
Claim 16
Dependent Claim 29 words
The method according to claim 11 wherein said third master is said second master such that said steps b) and c) are carried out internally to said second master.

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