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EP0402891A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Multiprocessor system with vector pipelines

Assignee: NEC Corp
•
Filing: 1990-06-13
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Granted: —
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Expires: 2010-06-13
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Abstract

Abstract In a multiprocessor system comprising a plurality of processors and a main memory common to the processors, each processor comprises at least one vector calculation unit which is specific to a vector calculation and which is independent of the vector calculation units in the other processors. A register holds a configuration signal representative of configuration of the vector calculation units in each processor. An access control unit controls access operations of the processors on the basis of the configuration signals in the processors to make the processors selectively access the main memory. Thus, the processors individually carry out the vector calculations to individually access the main memory.

Inventors

  • 👤 Koji C/O Nec Corporation Kinoshita

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 14:25
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/76; G06F15/80; G06F15/8053; G06F15/8092; G06F15/8007; G06F15/8015; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3885

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 78 words
A multiprocessor system comprising a plurality of processors and a main memory common to said plurality of the processors, each of said processors comprising at least one vector calculation unit specific to a vector calculation, said multiprocessor system comprising: access control means coupled to said vector calculation units in said processors, respectively, and to said main memory for individually controlling the vector calculation units in said processors to independently make the vector calculation units access said main memory.
Claim 2
Dependent Claim 78 words
A multiprocessor system comprising a plurality of processors and a main memory common to said plurality of the processors, each of said processors comprising at least one vector calculation unit specific to a vector calculation, said multiprocessor system comprising: access control means coupled to said vector calculation units in said processors, respectively, and to said main memory for individually controlling the vector calculation units in said processors to independently make the vector calculation units access said main memory.
Claim 3
Dependent Claim 118 words
A multiprocessor system as claimed in Claim 1, wherein each of said processors comprises register means for storing a configuration signal representative of configuration of said at least one vector calculation unit in each of said processors; said access control means comprising: arbitrating means coupled to said processors for arbitrating access to said main memory on the basis of said configuration signals sent from said processors to produce a control signal representative of the processor which is accessible to said main memory; and connection means connected to the vector calculation units of said processors and to said arbitrating means for selectively connecting, to said main memory, the vector calculation means of the processor indicated by said control signal.
Claim 4
Dependent Claim 26 words
A multiprocessor system as claimed in Claim 1 or 2, wherein said processors comprise the vector calculation units which are different in number from one another.
Claim 5
Dependent Claim 31 words
A multiprocessor system as claimed in Claim 3, wherein said register means in each of said processors indicates the number of the vector calculation units available in each of said processors.
Claim 6
Dependent Claim 42 words
A multiprocessor system as claimed in any one of Claims 1 to 4, each of said processors being operable to carry out processing other than said vector calculation, wherein each of said processors comprises a processing unit for carrying out said processing.

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