← Back to Patent Explorer
EP0400473A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Digital signal processing apparatus

Assignee: Sony Corp
•
Filing: 1990-05-23
•
Granted: —
•
Expires: 2010-05-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A digital signal processing apparatus for encoding an input digital signal. The apparatus comprises a predictive filter (3) supplied with the input digital signal for generating a filtered output, a circuit for controlling the frequency characteristics of the predictive filter, a predictive error detector for detecting a difference signal between the input digital signal and the filtered output (8), a frequency spectrum detector (32) for detecting the frequency spectrum of the input digital signal during every predetermined period, a re-quantizer (12) for re-quantizing the difference signal, a re-quantizing error detector (21) for detecting a re-quantizing error signal (SZ2), a noise filter (9) supplied with the re-quantizing error signal and producing an output signal fed back to the output of the re-quantizer, and a noise filter controller (33) for controlling the frequency characteristics of the noise filter in response to the output of the frequency spectrum detector. In this apparatus, the amount of calculations required for detecting the spectrum and selectively determining the frequency characteristics of the noise filter is reduced to conse­quently achieve efficient re-quantization of the input digital signal, hence improving the signal-to-quantization noise ratio with a simplified structure.

Inventors

  • 👤 Naoto Iwahashi
  • 👤 Kenzo Akagiri

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 20:17
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/3002; H04; H04B; H04B14/00; H04B14/02; H04B14/04; H04B14/046; H03M7/3004

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 143 words
A digital signal processing apparatus for encoding an input digital signal, comprising: predictive filter means supplied with said input digital signal for generating a filtered output; means for controlling the frequency character­istics of said predictive filter means; predictive error detecting means for detecting a difference signal between said input digital signal and said filtered output; frequency spectrum detecting means for detecting the frequency spectrum of said input digital signal during every predetermined period; re-quantizing means for re-quantizing said difference signal; re-quantizing error detecting means for detecting a re-quantizing error signal; noise filter means supplied with said re-quan­tizing error signal, the output signal of said noise filter means being fed back to the output of said re-quantizing means; and noise filter control means for controlling the frequency characteristics of said noise filter means in response to the output of said frequency spectrum detecting means.
Claim 2
Dependent Claim 143 words
A digital signal processing apparatus for encoding an input digital signal, comprising: predictive filter means supplied with said input digital signal for generating a filtered output; means for controlling the frequency character­istics of said predictive filter means; predictive error detecting means for detecting a difference signal between said input digital signal and said filtered output; frequency spectrum detecting means for detecting the frequency spectrum of said input digital signal during every predetermined period; re-quantizing means for re-quantizing said difference signal; re-quantizing error detecting means for detecting a re-quantizing error signal; noise filter means supplied with said re-quan­tizing error signal, the output signal of said noise filter means being fed back to the output of said re-quantizing means; and noise filter control means for controlling the frequency characteristics of said noise filter means in response to the output of said frequency spectrum detecting means.
Claim 3
Dependent Claim 52 words
A digital signal processing apparatus accord­ing to claim 1, further comprising buffer memory means provided on the input side of said frequency spectrum detecting means, wherein said buffer memory means divides the input digital signal into said predetermined periods and supplies said signal of each period to said frequency spectrum detecting means.
Claim 4
Dependent Claim 31 words
A digital signal processing apparatus accord­ing to claim 1, wherein said control means switches the frequency characteristics of said predictive filter means per predetermined period in response to said difference signal.
Claim 5
Dependent Claim 29 words
A digital signal processing apparatus accord­ing to claim 3, wherein the input signal level of said re-quantizing means is controlled in accordance with the output of said control means.
Claim 6
Dependent Claim 19 words
A digital signal processing apparatus accord­ing to claim 1, wherein said frequency spectrum detecting means has an LPC analyzer.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag