EP0400314A2
Expired / Lapsed
EP
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Spread spectrum communication system
Assignee: O'NEILL COMMUNICATIONS Inc
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Filing: 1990-04-14
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Granted: —
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Expires: 2010-04-14
Abstract
Abstract The spread spectrum digital communication system includes data input devices for generating digital information signals to be transmitted using radio signals. A chip stream generator converts the data bits into chip streams that are either complemented or not complemented via an exclusive-OR gate, depending on the data bits. A scrambler further randomizes the chip stream for transmission. The receiver includes a descrambler and a correlator or digital matched filter for detecting the data signal. A modified receiver includes a sampler for sampling the scrambled signal at a rate which is the multiple of the chip rate thereby eliminating any need for recovering the chip clock. Another modified version includes a receiver having means for generating multi-level signals indicating the quality of the probable detection.
Inventors
- 👤 Donald G. Chandler
- 👤 Steve J. Nossen
- 👤 Raymond W. Simpson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 08:17
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/709; H04B1/7093; H04J; H04J13/00
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
81 words
A digital communication system comprising: input means for inputting a digital information signal, at a data rate, to be transmitted; a chip stream generator means connected to said input means for converting said information signal into a chip stream having a chip rate greater than said data rate; scrambler means for scrambling said chip stream to produce a scrambled chip stream signal; and output means connected to said scrambler means for transmitting said scrambled chip stream signal as a radio signal.
Claim 2
Dependent Claim
81 words
A digital communication system comprising: input means for inputting a digital information signal, at a data rate, to be transmitted; a chip stream generator means connected to said input means for converting said information signal into a chip stream having a chip rate greater than said data rate; scrambler means for scrambling said chip stream to produce a scrambled chip stream signal; and output means connected to said scrambler means for transmitting said scrambled chip stream signal as a radio signal.
Claim 3
Dependent Claim
51 words
The system of claim 1 wherein said chip stream generator means includes a chip code generator means for generating an n-bit chip code for each data bit, and gate means for outputting the n-bit chip code or the complement of the n-bit chip code for different values of said data bit.
Claim 4
Dependent Claim
24 words
The system of claim 2 wherein said scrambler means includes means for scrambling said chip stream using a period of more than n chips.
Claim 5
Dependent Claim
53 words
The system of claim 1 further comprising: a descrambler means connected to said scrambled chip stream; a receiver means for receiving and detecting said receiver means for converting the detected scrambled chip stream into an unscrambled chip stream; and a data detector means connected to said descrambler means for detecting said data signal.
Claim 6
Dependent Claim
12 words
The system of claim 4 wherein said detector means is a correlator.
Claim 7
Dependent Claim
13 words
The system of claim 5 wherein said correlator is a digital matched filter.
Claim 8
Dependent Claim
51 words
The system of claim 6 wherein said chip stream generator means includes a chip code generator means for generating an n-bit chip code for each data bit, and gate means for outputting the n-bit chip code or the complement of the n-bit chip code for different values of said data bit.
Claim 9
Dependent Claim
24 words
The system of claim 7 wherein said scrambler means includes means for scrambling said chip stream using a period of more than n chips.
Claim 10
Dependent Claim
88 words
The system of claim 1 further comprising: a receiver means for receiving and detecting said transmitted scrambled chip stream; a sampler means connected to said receiver means for sampling said detected scrambled chip stream at a sampling rate which is a multiple of the rate of said chip stream; descrambler means connected to said sampler means for converting the output thereof into an unscrambled chip stream having a rate equal to said sampling rate; and data detector means connected to said descrambler means for detecting said data signal.
Claim 11
Dependent Claim
12 words
The system of claim 9 wherein said detector means is a correlator.
Claim 12
Dependent Claim
13 words
The system of claim 10 wherein said correlator is a digital matched filter.
Claim 13
Dependent Claim
51 words
The system of claim 11 wherein said chip stream generator means includes a chip code generator means for generating an n-bit chip code for each data bit, and gate means for outputting the n-bit chip code or the complement of the n-bit chip code for different values of said data bit.
Claim 14
Dependent Claim
24 words
The system of claim 12 wherein said scrambler means includes means for scrambling said chip stream using a period of more than n chips.
Claim 15
Dependent Claim
89 words
The system of claim 1 further comprising: a receiver means for receiving and detecting said transmitted scrambled chip stream; a sampler means connected to said receiver means for sampling the detected chip stream and encoding the samples into a series of first multi-level signals as a function of the level of said sample; descrambler means connected to said sampler means for descrambling said chip stream including converting the output thereof into a second multi-level signal; and data detector means connected to said descrambler means for detecting said data signal.
Claim 16
Dependent Claim
31 words
The system of claim 14 wherein said descrambler means includes a multiplier means for multiplying at least two spaced values of said first multi-level signal to produce said second multi-level signal.
Claim 17
Dependent Claim
21 words
The system of claim 15 wherein said spaced values .are spaced a distance greater than the length of one chip stream.
Claim 18
Dependent Claim
13 words
The system of claim 14 wherein said data detector means is a correlator.
Claim 19
Dependent Claim
13 words
The system of claim 17 wherein said correlator is a digital matched filter.
Claim 20
Dependent Claim
23 words
The system of claim 17 wherein said correlator includes a multi-level digital matched filter including means for digitally encoding said second multi-level signal.
References Cited (Backward Citations)
No citation records indexed.
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