EP0398032A2
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EP
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Method for manufacturing a semiconductor integrated circuit comprising an isolating region
Assignee: Sanyo Electric Co Ltd
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Filing: 1990-04-19
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Granted: —
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Expires: 2010-04-19
Abstract
Abstract A method of making a semiconductor integrated circuit provided with an isolating region constituted of an upper and lower isolating regions, and integrated circuit element regions is disclosed, wherein: the lower isolating region is diffused upward to a depth of a little more than half the thickness of an epitaxial layer to link with the upper isolating region prior to a doping of the upper isolating region; the doping of the lower isolating region and integrated circuit element regions, is implemented by means of ion implantation through a resist film which is capable of blocking ions implanted and in which specified doping windows have been formed in advance, and a SiO₂ film is used as a reference mask in an ion implanting step, and the respective borders of the upper isolating region and the specified regions of the circuit elements is determined by self-alignment. The method has advantages that the upper isolating region can be prepared by heat-treatment for relatively short time, reducing lateral diffusion and the occupied area thereof, and slippage by masking is remarkably reduced, providing a semiconductor integrated circuit with high density.
Inventors
- 👤 Kazuo Takeda
- 👤 Toshimasa Sadakata
- 👤 Teruo Tabata
- 👤 Nobuyuki Sekikawa
- 👤 Tadayoshi 1-302 Izumino-Danchi Takada
- 👤 Yasuhiro Tamada
- 👤 Yoshiaki Sano
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 21:10
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/02; H10D84/03; H10D84/038; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; Y; Y10; Y10S; Y10S148/00; Y10S148/009; Y10S148/01
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
113 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) forming a mask layer on the surface of the epitaxial layer and opening a portion of the mask layer for the lower isolating region to form a doping window; (iii) ion implanting an impurity into the epitaxial layer through the doping window to selectively form an upper isolating region constituting the other side of the isolating region; and (iv) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 2
Independent Claim
113 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) forming a mask layer on the surface of the epitaxial layer and opening a portion of the mask layer for the lower isolating region to form a doping window; (iii) ion implanting an impurity into the epitaxial layer through the doping window to selectively form an upper isolating region constituting the other side of the isolating region; and (iv) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 3
Dependent Claim
49 words
The method of manufacturing a semiconductor integrated circuit of Claim 1, wherein step (i) comprises steps of: doping semiconductor substrate with an impurity to form the lower isolating region, and growing the epitaxial layer of a conductive type which differs from the conductive type of the lower isolating region.
Claim 4
Dependent Claim
259 words
The method of manufacturing a semiconductor integrated circuit of Claim 1, wherein step (i) comprises steps of: forming a first silicon oxide film on the surface of a semiconductor substrate by a thermal oxidation method; forming a photoresist layer on the surface of the first silicon oxide film, and opening a portion of the photoresist layer for the lower isolating region; etching the first silicon oxide film using the photoresist layer as a mask, opening a portion of the first silicon film for the lower isolating region to form a doping window; doping the semiconductor substrate with a dopant through the first silicon oxide film after the photoresist layer is removed, to form the lower isolating region; and growing the epitaxial layer of a conductive type which differs from the conductive type of the lower isolating region on the surface of the semiconductor substrate after the first silicon oxide film is removed; and step (ii) comprises steps of: forming a second mask layer of a silicon oxide film or a silicon nitride film on the surface of the epitaxial layer; forming a photoresist layer on the surface of the second mask layer, and opening a portion of the photoresist layer for the upper isolating region; etching the second mask layer underneath using the photoresist layer as a mask, opening a portion of the mask layer for the upper isolating region to form a doping window; and ion implanting through the doping window of the second mask layer after the photoresist layer is removed, to form the upper isolating region.
Claim 5
Independent Claim
129 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing the lower isolating region in a specified condition; (iii) forming a first mask layer on the surface of the epitaxial layer and opening a portion of the first mask layer for the lower isolating region to form a doping window; (iv) ion implanting an impurity into the epitaxial layer through the doping window of the first mask layer to form an upper isolating region constituting the other side of the isolating region; and (v) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 6
Independent Claim
129 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing the lower isolating region in a specified condition; (iii) forming a first mask layer on the surface of the epitaxial layer and opening a portion of the first mask layer for the lower isolating region to form a doping window; (iv) ion implanting an impurity into the epitaxial layer through the doping window of the first mask layer to form an upper isolating region constituting the other side of the isolating region; and (v) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 7
Dependent Claim
33 words
The method of manufacturing a semiconductor integrated circuit of Claim 4, wherein the lower isolating region is diffused upward to a depth of little more than half the thickness of the epitaxial layer.
Claim 8
Dependent Claim
29 words
The method of manufacturing a semiconductor integrated circuit of Claim 4, wherein the diffusion depth of the lower isolating region is greater than that of the upper isolating region.
Claim 9
Dependent Claim
40 words
The method of manufacturing a semiconductor integrated circuit of Claim 4, wherein the first mask layer formed on the surface of the epitaxial layer is the silicon oxide film formed in step (ii) wherein the lower isolating region is diffused.
Claim 10
Dependent Claim
235 words
The method of manufacturing a semiconductor integrated circuit of Claim 4, wherein step (i) comprises steps of: forming a first silicon oxide film on the surface of a semiconductor substrate by a thermal oxidation method; forming a photoresist layer on the surface of the first silicon oxide film, and opening a portion of the photoresist layer for the lower isolating region; etching the first silicon oxide film using the photoresist layer as a mask, opening a portion of the first silicon film for the lower isolating region to form a doping window; doping the semiconductor substrate with a dopant through the first silicon oxide film after the photoresist layer is removed, to form the lower isolating region; and growing the epitaxial layer of a conductive type which differs from the conductive type of the lower isolating region on the surface of the semiconductor substrate after the first silicon oxide film is removed; and step (iii) comprises steps: forming a second mask layer of a silicon oxide film or a silicon nitride film on the surface of the epitaxial layer; forming a photoresist layer on the surface of the second mask layer, and opening a portion of the photoresist layer for the upper isolating region; and etching the second mask layer underneath using the photoresist layer as a mask, opening a portion of the mask layer for the upper isolating region to form a doping window.
Claim 11
Independent Claim
172 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing the lower isolating region in a specified condition; (iii) forming a first mask layer on the surface of the epitaxial layer, and opening portions of the first mask layer for the lower isolating region and integrated circuit element regions respectively to form each doping window; (iv) forming a second mask layer on the first mask layer, and opening portions of the second mask layer for at least one of the doping windows of the first mask layer to form each doping window; (v) ion implanting into the epitaxial layer through the doping window of the first and second mask layers to form the upper isolating region or the integrated circuit element region, or the both; and (vi) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 12
Independent Claim
172 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing the lower isolating region in a specified condition; (iii) forming a first mask layer on the surface of the epitaxial layer, and opening portions of the first mask layer for the lower isolating region and integrated circuit element regions respectively to form each doping window; (iv) forming a second mask layer on the first mask layer, and opening portions of the second mask layer for at least one of the doping windows of the first mask layer to form each doping window; (v) ion implanting into the epitaxial layer through the doping window of the first and second mask layers to form the upper isolating region or the integrated circuit element region, or the both; and (vi) diffusing the upper isolating region to link the lower isolating region with the upper isolating region.
Claim 13
Dependent Claim
33 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein the lower isolating region is diffused upward to a depth of little more than half the thickness of the epitaxial layer.
Claim 14
Dependent Claim
29 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein the diffusion depth of the lower isolating region is greater than that of the upper isolating region.
Claim 15
Dependent Claim
37 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein the size of each doping window of the first mask layer is larger than that of each corresponding doping window of the second mask layer.
Claim 16
Dependent Claim
36 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein a substantially short circuit is not made between the upper isolating region and each region of the integrated circuit elements in the lateral direction.
Claim 17
Dependent Claim
47 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein the distance in the lateral direction between the upper isolating region and each region of the integrated circuit elements is at least 0.8 times as long as the diffusion depth of the upper isolating region.
Claim 18
Dependent Claim
23 words
The method of manufacturing a semiconductor integrated circuit of Claim 9, wherein the integrated circuit element region is a diffused resistance element region.
Claim 19
Independent Claim
211 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing upward the lower isolating region to a depth of a little more than half the thickness of the epitaxial layer; (iii) forming a first mask layer on the surface of the epitaxial layer, and opening portions of the first mask layer for the upper isolating region at least and a base region of a transistor to form each doping window; (iv) forming a second mask layer on the first mask layer, and opening a portion of the first mask layer for the upper isolating region to form a doping window; (v) ion implanting into the epitaxial layer through the doping window of the first and second mask layers to form the upper isolating region; (vi) forming a third mask layer on the first mask layer after removing the second mask layer, and opening portions of the third mask layer for at least the base region of the transistor to form each doping window; and (vii) doping the epitaxial layer with an impurity to form at least the base region of the transistor.
Claim 20
Independent Claim
211 words
A method of manufacturing a semiconductor integrated circuit comprising steps of: (i) forming a lower isolating region constituting one side of an isolating region between a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate; (ii) diffusing upward the lower isolating region to a depth of a little more than half the thickness of the epitaxial layer; (iii) forming a first mask layer on the surface of the epitaxial layer, and opening portions of the first mask layer for the upper isolating region at least and a base region of a transistor to form each doping window; (iv) forming a second mask layer on the first mask layer, and opening a portion of the first mask layer for the upper isolating region to form a doping window; (v) ion implanting into the epitaxial layer through the doping window of the first and second mask layers to form the upper isolating region; (vi) forming a third mask layer on the first mask layer after removing the second mask layer, and opening portions of the third mask layer for at least the base region of the transistor to form each doping window; and (vii) doping the epitaxial layer with an impurity to form at least the base region of the transistor.
Claim 21
Dependent Claim
29 words
The method of manufacturing a semiconductor integrated circuit of Claim 16, wherein step (vii) is characterized by ion implanting simultaneously into the base region and the upper isolating region.
Claim 22
Dependent Claim
26 words
The method of manufacturing a semiconductor integrated circuit of Claim 16, wherein step (vii) is characterized by ion implanting an impurity only into the base region.
Claim 23
Dependent Claim
44 words
The method of manufacturing a semiconductor integrated circuit of Claim 16, wherein step (iii) is characterized by opening respective portions of the first mask layer for the upper isolating region, the base region of the transistor, a collector contact region, and a resistance region.
Claim 24
Dependent Claim
84 words
The method of manufacturing a semiconductor integrated circuit of Claim 16, after step (vii), further comprising steps of: forming a fourth mask layer on the first mask layer after the third mask is removed, and opening each portion of the fourth mask layer for at least the base contact region of the transistor to form each doping window; and doping the epitaxial layer with an impurity through the first and fourth mask layers to form at least the base contact region of the transistor.
Claim 25
Dependent Claim
26 words
The method of manufacturing a semiconductor integrated circuit of Claim 21, wherein the doping of the base contact region is implemented by means of ion implanting.
Claim 26
Dependent Claim
34 words
The method of manufacturing a semiconductor integrated circuit of Claim 21, wherein an impurity is ion implanted into the upper isolating region simultaneously when an impurity is ion implanted into the base contact region.
References Cited (Backward Citations)
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