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EP0395210A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Threshold detection circuits for digital storage buffers

Assignee: Advanced Micro Devices Inc
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Filing: 1990-03-14
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Granted: —
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Expires: 2010-03-14
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Abstract

Abstract A threshold detection logic circuit of simple and economical design is disclosed that indicates when the difference in the number of first operations to be counted and the number of second operations to be counted is either greater than or equal to a threshold value, or less than or equal to a threshold value. The threshold detection logic circuit employs the use of an overflow bit of a counter, which has a counting range of 2 N+1 for a threshold range of 2 N , in order to generate a threshold interrupt signal. In addition, the disclosed threshold detection logic circuit permits the threshold value to be programmed to any desired value.

Inventors

  • 👤 Mayur M. Mehta
  • 👤 Henry S. Choy

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 21:15
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/06; G06F5/10; G06F5/12; G06F5/14; G06F7/00; G06F7/60; G06F7/62; G06F2205/00; G06F2205/12; G06F2205/126

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 105 words
A threshold detection logic circuit comprising: a. first means for loading a threshold value in a threshold value register; b. second means for loading an initial count value that is related to said threshold value in a counter, wherein said counter performs a first operation in responsive to a first input signal and a second operation in response to a second input signal; c. third means for generating an output signal when the difference between the total number of first operations performed by said counter and the total number of second operations performed by said counter is greater than or equal to said threshold value.
Claim 2
Dependent Claim 105 words
A threshold detection logic circuit comprising: a. first means for loading a threshold value in a threshold value register; b. second means for loading an initial count value that is related to said threshold value in a counter, wherein said counter performs a first operation in responsive to a first input signal and a second operation in response to a second input signal; c. third means for generating an output signal when the difference between the total number of first operations performed by said counter and the total number of second operations performed by said counter is greater than or equal to said threshold value.
Claim 3
Dependent Claim 26 words
A threshold detection logic circuit as claimed in claim 1, wherein said first operation is an increment operation and said second operation is a decrement operation.
Claim 4
Dependent Claim 27 words
A threshold detection logic circuit as claimed in claim 1, wherein said count value loaded by said second means is the one's complement of said threshold value.
Claim 5
Dependent Claim 31 words
A threshold detection logic circuit as claimed in claim 1, wherein said threshold value has a range of 2 N and said counter has a count range of 2 N+1 .
Claim 6
Dependent Claim 27 words
A threshold detection logic circuit as claimed in claim 2, wherein said count value loaded by said second means is the two's complement of said threshold value.
Claim 7
Dependent Claim 107 words
A threshold detection logic circuit comprising: a. first means for loading a threshold value in a threshold value register; b. second means for loading an initial count value that is related to said threshold value in a counter, wherein said counter performs a first operation in responsive to a first input signal and a second operation in response to a second input signal; c. third means for generating an output signal when the difference between the total number of first operations performed by said second means and the total number of second operations performed by said second means is less than or equal to said threshold value.
Claim 8
Dependent Claim 107 words
A threshold detection logic circuit comprising: a. first means for loading a threshold value in a threshold value register; b. second means for loading an initial count value that is related to said threshold value in a counter, wherein said counter performs a first operation in responsive to a first input signal and a second operation in response to a second input signal; c. third means for generating an output signal when the difference between the total number of first operations performed by said second means and the total number of second operations performed by said second means is less than or equal to said threshold value.
Claim 9
Dependent Claim 27 words
A threshold detection logic circuit as claimed in claim 6, wherein said count value loaded by said second means is the one's complement of said threshold value.
Claim 10
Dependent Claim 31 words
A threshold detection logic circuit as claimed in claim 7, wherein said threshold value has a range of 2 N and said counter has a counting range of 2 N+1 .
Claim 11
Dependent Claim 26 words
A threshold detection logic circuit as claimed in claim 6, wherein said first operation is an increment operation and said second operation is a decrement operation.

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