EP0394624A2
Expired / Lapsed
EP
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Multiple sequence processor system
Assignee: International Business Machines Corp
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Filing: 1990-02-06
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Granted: —
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Expires: 2010-02-06
Abstract
Abstract A digital computer includes a main and an auxiliary pipeline processor which are configured to concurrently execute contiguous groups of instructions taken from a single instruction sequence. The instructions in a sequence may be divided into groups by using either taken-branch instructions or certain instructions which may change the contents of the general purpose registers as group delimiters. Both methods of grouping the instructions use a branch history table to predict the sequence in which the instructions will be executed.
Inventors
- 👤 Philip George Emma
- 👤 Joshua Wilson Knight
- 👤 James Herbert Pomerene
- 👤 Rudolph Nathan Rechtschaffen
- 👤 Frank John Sparacio
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 13:22
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3836; G06F9/3842; G06F9/3844; G06F9/3853; G06F9/3885
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
88 words
A digital data processing system, comprising: means for providing one sequence of instructions dividable into at least a first group of instructions and a second group of instructions according to a predetermined delimiting rule; queueing means for storing first and second values representing said first and second groups of instructions; main and auxiliary data processing means; and means for dispatching the first and second values to the respective main and auxiliary data processing means to provide for the concurrent execution of said first and second groups of instructions.
Claim 2
Dependent Claim
88 words
A digital data processing system, comprising: means for providing one sequence of instructions dividable into at least a first group of instructions and a second group of instructions according to a predetermined delimiting rule; queueing means for storing first and second values representing said first and second groups of instructions; main and auxiliary data processing means; and means for dispatching the first and second values to the respective main and auxiliary data processing means to provide for the concurrent execution of said first and second groups of instructions.
Claim 3
Dependent Claim
80 words
The digital data processing system set forth in Claim 1, further including: monitoring means, coupled to said main and auxiliary data processing means, for detecting the occurrence of an action taken by said main data processing means which may affect the concurrent execution of said second group of instructions by said auxiliary data processing means; and means for invalidating the execution of said second group of instructions by said auxiliary data processing means responsive to the detection of said action.
Claim 4
Dependent Claim
60 words
The digital data processing system set forth in Claim 2, further including: a register file including a plurality of general purpose registers for use by each of said main and auxiliary data processing means; and means, coupled to said register file, for resolving conflicting use of said plurality of general purpose registers by said main and auxiliary data processing means.
Claim 5
Dependent Claim
62 words
The digital data processing system set forth in Claim 3, wherein said monitoring means includes register check means for detecting irresolvable conflicts in the use of any of said plurality of registers by said main and auxiliary processing means and, upon detecting one of said irresolvable conflicts, for invalidating the execution of said second group of instructions by said auxiliary processing means.
Claim 6
Dependent Claim
81 words
The digital data processing system set forth in Claim 3, wherein said predetermined delimiting rule delimits successive groups of instructions by occurrences of successive members of a predetermined set of instructions, each of which modifies data in said register file, and said digital data processing system further includes means, coupled to said main and auxiliary data processing means, for providing said group delimiting values, representing respective counts of instructions in said first and second groups of instructions, to said queueing means.
Claim 7
Dependent Claim
63 words
The digital data processing system set forth in Claim 1, wherein said predetermined delimiting rule delimits successive groups of instructions by occurrences of successive taken branch instructions, and said digital data processing system further includes means, coupled to said main and auxiliary data processing means, for providing said group delimiting values representing the addresses of said taken branch instructions to said queueing means.
Claim 8
Dependent Claim
57 words
The digital data processing system set forth in Claim 1, wherein said means for providing group delimiting values representing the addresses of said taken branch instructions includes means for monitoring the taken branch instructions executed by said first and second data processing means and for storing the address of the target instruction of each taken branch instruction.
Claim 9
Dependent Claim
121 words
In a digital computer system as set forth in anyone of the preceeding claims including first and second data processing means, a method for processing a sequence of instructions that is dividable into first and second groups of instructions in accordance with a delimiting rule, comprising the steps of: A. delimiting said first and second groups of instructions in said sequence of instructions according to said delimiting rule; B. storing first and second values representing said first and second groups of instructions in group queueing means; C. dispatching said first and second values to said first and second data processing means to condition said first and second data processing means to concurrently execute said first and second groups of instructions, respectively.
Claim 10
Dependent Claim
83 words
The method set forth in Claim 8 further including the steps of: monitoring said first and second data processing means to detect the occurrence of an action taken by said main data processing means, in executing said first group of instructions, which may affect the execution of said second group of instructions by said auxiliary data processing means; and invalidating the execution of said second group of instructions by said auxiliary data processing means in response to the detected occurrence of said action.
Claim 11
Dependent Claim
47 words
The method set forth in Claim 9 further including the step of dispatching said second value representing said second sequence of instructions to said main data processing means in response to the invalidation of the execution of said second group of instructions by auxiliary data processing means.
Claim 12
Dependent Claim
57 words
The method set forth in Claim 8 wherein step A includes the steps of: detecting the occurrence of a taken branch instruction in said sequence of instructions; and dividing said sequence of instructions into said first group of instructions which precede said taken branch instruction and said second group of instructions which follow said taken branch instruction.
Claim 13
Dependent Claim
70 words
The method set forth in Claim 8 wherein step A includes the steps of: detecting the occurrence of an instruction from a set of instructions which modify data which may be used by both of the first and second data processing means; and dividing said sequence of instructions into said first group of instructions which precede said detected instruction and said second group of instructions which follow said detected instruction.
References Cited (Backward Citations)
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