Field effect transistors and method of making a field effect transistor

Claim 2

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor comprising: a fine T-shaped gate (32) which is separated from a source and a drain electrode (34,33) by an L-shaped and a reversely L-shaped insulating film (29a,29b), respectively.

Claim 3

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor as defined in claim 1, wherein said insulating film (29a,29b) comprises SiN.

Claim 4

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor comprising: an n⁺ type InGaAs layer (26) produced at an upper surface of the device; a source and a drain electrode (34,33) produced on said n⁺ type InGaAs layer (26), which is capable of producing non-alloying ohmic-contact with said InGaAs layer (26); a gate electrode (32) produced of the same metal as said source and drain electrodes (34,33); and said gate electrode (32) and said source and drain electrodes (34,33) being self-aligningly position determined with separated from each other via thickness of L-shaped and reversely L-shaped insulating films (29a,29b).

Claim 5

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor comprising: an n⁺ type InGaAs layer (26) produced at an upper surface of the device; a source and a drain electrode (34,33) produced on said n⁺ type InGaAs layer (26), which is capable of producing non-alloying ohmic-contact with said InGaAs layer (26); a gate electrode (32) produced of the same metal as said source and drain electrodes (34,33); and said gate electrode (32) and said source and drain electrodes (34,33) being self-aligningly position determined with separated from each other via thickness of L-shaped and reversely L-shaped insulating films (29a,29b).

Claim 6

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor as defined in claim 3, wherein said source (34), drain (33), and gate electrodes (32) comprise Ti/Mo/Au, Ti/Au, or Ti/Pt/Au, and said insulating films (29a,29b) comprise SiN.

Claim 7

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor comprising: an n⁺ type InGaAs layer (26) produced at an upper surface of the device; a portion of said n⁺ type InGaAs layer (26) being selectively etched against an n type GaAs layer (25) therebelow; and a gate metal (32) being produced on said n type GaAs layer (25) without conducting an etching of said n type GaAs layer (25).

Claim 8

A semiconductor device constituting a high electron mobility transistor or metal semiconductor field effect transistor comprising: an n⁺ type InGaAs layer (26) produced at an upper surface of the device; a portion of said n⁺ type InGaAs layer (26) being selectively etched against an n type GaAs layer (25) therebelow; and a gate metal (32) being produced on said n type GaAs layer (25) without conducting an etching of said n type GaAs layer (25).

Claim 9

A production method of a semiconductor device comprising: a first process for producing a first kind of insulating film (27) on the entire surface of wafer; a second process for producing a groove at said first kind of insulating film (27) by an etching with using a photoresist pattern (28); a third process for producing a second kind of insulating film (29) on the entire surface of wafer; a fourth process for producing a third kind or first kind of insulating film and etching said insulating film to produce a side wall (30) at the side surface of said groove portion; a fifth process for selectively etching said second kind of insulating film (29) with using said side wall (30) and said first kind of insulating film (27) as a mask thereby to remove said second kind of insulating film (29) at the bottom of said groove; and a sixth process for selectively etching said first kind of insulating film (27), or said first kind and third kind of insulating film against said second kind of insulating film (29) and producing a second kind of insulating film having an L-shaped or reversely L-shaped insulating film (29a,29b).

Claim 10

A production method of a semiconductor device comprising: a first process for producing a first kind of insulating film (27) on the entire surface of wafer; a second process for producing a groove at said first kind of insulating film (27) by an etching with using a photoresist pattern (28); a third process for producing a second kind of insulating film (29) on the entire surface of wafer; a fourth process for producing a third kind or first kind of insulating film and etching said insulating film to produce a side wall (30) at the side surface of said groove portion; a fifth process for selectively etching said second kind of insulating film (29) with using said side wall (30) and said first kind of insulating film (27) as a mask thereby to remove said second kind of insulating film (29) at the bottom of said groove; and a sixth process for selectively etching said first kind of insulating film (27), or said first kind and third kind of insulating film against said second kind of insulating film (29) and producing a second kind of insulating film having an L-shaped or reversely L-shaped insulating film (29a,29b).

Claim 11

A production method of a semiconductor device as defined in claim 6, which further comprises process steps of: conducting a selective etching only to said n⁺ type InGaAs layer (26) with using said first and second kinds of insulating films (27,29) and said side wall (30) as a mask; vapor depositing metal (31) at desired portions; and removing excess metal by the use of diagonal direction ion milling or co-use of ion milling and etching utilizing L-shaped or reversely L-shaped second insulating films (29a,29b), thereby to separate said source and drain electrodes (34,33) from said gate electrode (32).

Claim 12

A production method of a semiconductor device as defined in claim 7, wherein said selective etching is conducted with using boiled conc-HCl.

Claim 13

A production method of a semiconductor device as defined in claim 8, wherein said metal (31) comprises Ti/Mo/Au, Ti/Au, or Ti/Pt/Au.

Claim 14

A production method of a semiconductor device as defined in claim 6, wherein said first kind of insulating film (27) comprises SiO, and said second kind of insulating film (29) comprises SiN.

Claim 15

A production method of a semiconductor device as defined in claim 6, wherein said etching in said second process is conducted by RIE using C₂F₆ + CHF₃ + O₂ + He gas.

Claim 16

A production method of a semiconductor device as defined in claim 6, wherein said etching in said fourth process is conducted by RIE using C₂F₆ + CHF₃ + O₂ + He gas.

Claim 17

A production method of a semiconductor device as defined in claim 6, wherein said etching in said fifth process is conducted by RIE using CHF₃ + O₂ gas.

Claim 18

A production method of a semiconductor device as defined in claim 6, wherein said etching in said seventh process is conducted by RIE using C₂F₆ + CHF₃ + O₂ + He gas.