Television scan line doubler including temporal median filter

Claim 2

A television line doubler for doubling the number of scan lines available from incoming video for display upon a display device, the line doubler comprising inter­polation means (22) for generating an interpolation pixel i in a one field delayed F1 field, real pixel time compression means (14) connected to time compress the pixels of each scan line of the F1 field into half of the original scan time and to put out time compressed scan lines during a first double scan rate line scan interval, interpolated pixel time compression means (24) connected to time compress the interpolated pixels i of each scan line put out by the interpolation means (22) into half of the original scan time and to put out the time compressed scan lines during a second double scan rate line scan interval, and switch means (16) for switching between the outputs of the real pixel time compression means (14) and the interpolated pixel time compression means (24) for putting out line doubled video to the display device, the line doubler being characterised in that the inter­polation means (22) comprises temporal median filter means for generating the interpolation pixel i by selecting the median one of a group of temporal pixel values derived from the incoming video.

Claim 3

A television line doubler according to claim 1, wherein the group of temporal pixel values includes an actual pixel value c from a present field F0, a pixel average value of F1 (a + b)/2 in the F2 field where a is the pixel in the scan line above the pixel i location and b is the pixel in the scan line below the pixel i location, and an actual pixel value d form a two field delayed field F2.

Claim 4

A television line doubler according to claim 1 or 2, comprising intra-field pixel interpolator means (28) for putting out as an interpolated pixel the F1(a + b)/2 intra-field average value, second switch means (26) connected to switch between the output of the temporal median filter means (22) and the output of the intra-­field pixel interpolator means (28), and motion detection means (30) for detecting a motion value in the vicinity of the pixel i to be interpolated for causing the second switch means (26) to switch its output to the inter­polated pixel time compression means (24) from the temporal median filter means (22) to the intra-field interpolator means (28) in accordance with the motion value.

Claim 5

A television line doubler according to claim 3, wherein the second switch means (26) is a proportional switch which switches in accordance with absolute amplitude of the motion value.

Claim 6

A television line doubler according to claim 4, wherein the switching characteristic of the proportional switch (26) has an onset at approximately 2 to 5 IRE units of motion value amplitude and reaches full switch over to the intra-field interpolator means (28) at approximately 5 to 15 IRE units of motion value amplitude.

Claim 7

A television line doubler according to any one of claims 1 to 5, comprising an input for receiving pixel values from a present field F0, a first field delay means connected to the input and having an output F1a, a first line delay means connected to the output of the first field delay means and having an output F1b, a second field delay means connected to the output of the first line delay means and having an output F2, and an averager means connected to average the output of the first field delay line means and the first line delay means to provide an output F1(a + b)/2, the temporal median filter means (22) comprising a temporal median selector means (88, 90, 92) connected to select and put out as an interpolated pixel value F1i the median one of the values F0, F1(a + b)/2 and F2 and temporal median control means (80, 82, 84, 86) connected to receive the F0, F1(a + b)/2 and F2 values for generating a median selection signal and for applying the signal to control median selection by the temporal median selector means.

Claim 8

A pixel interpolator for generating interpolation pixels from incoming picture image pixels for use in a television picture scan line doubler system, the inter­polator comprising inter-field interpolation means (22) for generating an inter-field interpolation pixel, intra-field averager means (28) for generating an intra-­field pixel average and switch means (26, 30) connected to switch an input to a line doubler of the system between the outputs of the inter-field interpolation means (22) and the intra-field averager means (24) in response to detection of pixel motion within the picture image, the interpolator being characterised in that the inter-field interpolation means (22) comprises temporal median filter means for generating an interpolation pixel by selecting the median one of a plurality of temporal pixel samples derived from the incoming video.

Claim 9

A pixel interpolator for generating interpolation pixels from incoming picture image pixels for use in a television picture scan line doubler system, the inter­polator comprising inter-field interpolation means (22) for generating an inter-field interpolation pixel, intra-field averager means (28) for generating an intra-­field pixel average and switch means (26, 30) connected to switch an input to a line doubler of the system between the outputs of the inter-field interpolation means (22) and the intra-field averager means (24) in response to detection of pixel motion within the picture image, the interpolator being characterised in that the inter-field interpolation means (22) comprises temporal median filter means for generating an interpolation pixel by selecting the median one of a plurality of temporal pixel samples derived from the incoming video.

Claim 10

A pixel interpolator according to claim 7, wherein the intra-field averager means (28) is connected to provide an intra-field pixel average as one input to the temporal median filter means (22).

Claim 11

A pixel interpolator according to claim 7 or 8, wherein the switch means (26, 30) comprises a proportional switch means for switching proportionally from the temporal median filter means (22) to the intra-­field averager means (28) in response to the level of a motion control signal representative of the amplitude level of motion activity as a function of brightness level in the proximate vicinity of the pixel presently being interpolated within the picture image.

Claim 12

A pixel interpolator according to claim 9, wherein the motion control signal has an onset at approximately 3-10 IRE units and causes complete switch over from the temporal median filter means (22) to the intra-field averager means (28) at approximately 7-15 IRE units of motion amplitude.

Claim 13

A pixel interpolator according to claim 9 or 10, wherein the proportional switch means (26, 30) establishes brightness level in the proximate vicinity of the pixel presently being interpolated by reference to the horizontal, vertical and temporal domain adjacent to said pixel.

Claim 14

A pixel interpolator according to any one of claims 7 to 11, wherein the incoming picture image pixels comprise separated luminance pixels and separated chroma pixels and said temporal median filter means (22Y) and said intra-field averager means (28Y) and said switch means (26, 30) comprise a luminance processor for inter­polating said luminance pixels within said system, the interpolator further comprising a chroma processor including chroma temporal median filter means (25) for generating an interpolation pixel by selection of the median one of a plurality of temporal chroma pixel samples derived from incoming chroma, a chroma intra-­field averager means (28C) for generating an intra-field chroma pixel average from incoming chroma, and chroma switch means (26C) connected to switch a chroma input to the line doubler of the system between outputs of the chroma temporal median filter means (25) and the chroma intra-field averager means (28C) in response to detection by the luminance switch means (26Y, 30) of pixel motion within the picture image.

Claim 15

A pixel interpolator according to claim 12, comprising chroma level detector means (94) for detecting chroma level at the vicinity of the luminance pixel to be interpolated and for overriding control by the luminance switch means (26, 30) whenever chroma level at the said vicinity of the pixel to be interpolated exceeds a predetermined threshold amplitude.

Claim 16

A pixel interpolator according to claim 13, wherein the chroma level detector means (94) measures red level amplitude and begins to override control of the chroma switch means (26C) by the luminance switch means (26Y, 30) whenever red level reaches a predetermined level in a range between 30 and 50 IRE units.

Claim 17

A pixel interpolator according to claim 14, wherein the chroma level detector (94) causes smoothly proportional switching between outputs of the chroma temporal median filter means (25) and the chroma intra-­field averager means (28C) as a function of chroma level with an onset lying in a range between 30 and 50 IRE units and a full-on lying in a range between 60 and 80 IRE units.

Claim 18

A pixel interpolator according to any one of claims 7 to 15, wherein the switch means (26) generates a temporal median filter selection control signal for controlling selection of the median pixel by the temporal median filter means (22).

Claim 19

In a compatible, high resolution television display system for converting conventional picture images into line doubled picture images for display on a scan-line-doubled display device, the system for receiving at an input a quadrature modulated subcarrier colour television picture composite signal from a source and comprising spatial comb filter separator means connected to the input for separating and putting out chrominance and luminance components of the composite signal, the system being characterised by temporal median filter interpolator means (22Y, 25) connected to receive the chrominance and luminance components from the spatial comb filter separator means, the temporal median filter interpolator means separately interpolating pixels from real pixels of each of the chrominance and luminance components and supplying real luminance component pixels, interpolated luminance pixels, real chrominance pixels and interpolated chrominance pixels to line doubler means (102) which includes luminance buffer memory means (14Y, 24Y) for arranging and putting out said real luminance component pixels as scan lines and said interpolated luminance pixels as scan lines of a line doubled luminance component and chrominance buffer memory (14C, 24C) for arranging and putting out said real chrominance component pixels as scan lines and said interpolated chrominance component pixels as scan lines of a line doubled chrominance component, and transcoder means (104) connected to receive the line doubled luminance component and the line doubled chrominance component for decoding and putting out three colour control signals to operate said line doubled display device.

Claim 20

In a compatible, high resolution television display system for converting conventional picture images into line doubled picture images for display on a scan-line-doubled display device, the system for receiving at an input a quadrature modulated subcarrier colour television picture composite signal from a source and comprising spatial comb filter separator means connected to the input for separating and putting out chrominance and luminance components of the composite signal, the system being characterised by temporal median filter interpolator means (22Y, 25) connected to receive the chrominance and luminance components from the spatial comb filter separator means, the temporal median filter interpolator means separately interpolating pixels from real pixels of each of the chrominance and luminance components and supplying real luminance component pixels, interpolated luminance pixels, real chrominance pixels and interpolated chrominance pixels to line doubler means (102) which includes luminance buffer memory means (14Y, 24Y) for arranging and putting out said real luminance component pixels as scan lines and said interpolated luminance pixels as scan lines of a line doubled luminance component and chrominance buffer memory (14C, 24C) for arranging and putting out said real chrominance component pixels as scan lines and said interpolated chrominance component pixels as scan lines of a line doubled chrominance component, and transcoder means (104) connected to receive the line doubled luminance component and the line doubled chrominance component for decoding and putting out three colour control signals to operate said line doubled display device.

Claim 21

A display system according to claim 18, comprising colour vertical transition enhancement means connected to said transcoder means (104) for shortening the transition times of transitions of said three colours control signals.

Claim 22

A display system according to claim 18 or 19, wherein said temporal median filter interpolator means (22Y, 25) comprises luminance signal domain median filter means (22Y) and chrominance temporal domain median filter means (25).

Claim 23

A display system according to claim 20, comprising luminance median filter bypass soft switch means (26Y) connected at the output of the luminance median filter means (22Y) for switching to a luminance spatial average value, chrominance median bypass soft switch means (26C) connected at the output of the chrominance median filter means (25) for switching to a chrominance spatial average value, and luminance motion detection means (30) for detecting motion in the luminance component and for generating a luminance switching control signal for operating the luminance median bypass soft switch means (26Y) and for operating the chrominance median bypass soft switch means (26C).

Claim 24

A display system according to claim 21, comprising chrominance level detection means (94) for detecting chrominance level and for putting out a chrominance override switching control signal above a predetermined threshold level, the chrominance median bypass soft switch means (26C) being controlled by the luminance control signal below the threshold level and by the chrominance override switching control signal above the threshold level.

Claim 25

A display system according to claim 22, wherein the threshold level is preestablished in a range of 30 to 50 IRE units.

Claim 26

A display system according to claim 21, 22 or 23, wherein the onset of the luminance switching control signal lies in a range of 307 IRE units of motion amplitude.

Claim 27

A display system according to claim 24, wherein the luminance switching control signal is substantially linear with motion amplitude and reaches maximum value in a range lying between 5 and 15 IRE units.

Claim 28

A display device according to any one of claims 18 to 25, wherein the spatial comb filter means includes two series connected line period delay elements.

Claim 29

A motion detector for detecting motion in a video picture and for putting out a motion detection value, characterised by first frame delay means for delaying an incoming pixel F0 by two fields to put out a delayed pixel F2 at the time of arrival of the F0 pixel, difference means (32) for subtracting the amplitude of one of the F0 and F2 values from the amplitude of the other thereof and for putting out a difference value, sign removal means (36) for removing the sign of the difference value and for putting out an absolute value, threshold means (62) for establishing and passing the absolute value above a predetermined minimum threshold value, horizontal stretch means (64) for stretching the motion value over a predetermined number of pixels adjacent to the said pixel and for providing an output (F0c and F2d) to one input of OR logic means (76), field delay means (68) connected to the output of the horizontal stretch means for delaying the stretched motion value by one field duration and for putting out the field delayed value (F1 a) to a second input of the OR logic means (76), and line delay means (72) connected to the output of the field delay means for delaying the field delayed, stretched motion value by one scan line period and for putting out the field and line delayed value (F1b) to a third input of the OR logic means (76), the OR logic means (76) selecting and putting out as the motion detection value the signal at any of its inputs having the greatest absolute magnitude.

Claim 30

A motion detector for detecting motion in a video picture and for putting out a motion detection value, characterised by first frame delay means for delaying an incoming pixel F0 by two fields to put out a delayed pixel F2 at the time of arrival of the F0 pixel, difference means (32) for subtracting the amplitude of one of the F0 and F2 values from the amplitude of the other thereof and for putting out a difference value, sign removal means (36) for removing the sign of the difference value and for putting out an absolute value, threshold means (62) for establishing and passing the absolute value above a predetermined minimum threshold value, horizontal stretch means (64) for stretching the motion value over a predetermined number of pixels adjacent to the said pixel and for providing an output (F0c and F2d) to one input of OR logic means (76), field delay means (68) connected to the output of the horizontal stretch means for delaying the stretched motion value by one field duration and for putting out the field delayed value (F1 a) to a second input of the OR logic means (76), and line delay means (72) connected to the output of the field delay means for delaying the field delayed, stretched motion value by one scan line period and for putting out the field and line delayed value (F1b) to a third input of the OR logic means (76), the OR logic means (76) selecting and putting out as the motion detection value the signal at any of its inputs having the greatest absolute magnitude.

Claim 31

A motion detector according to claim 27, comprising second OR logic means (40) connected between the sign removal means (36) and the threshold means (62) for receiving the output of the sign removal means as one input thereto and further comprising recirculation loop means (44, 50, 58, 60) including frame delay means (50) connected to the output of the sign removal means (36) for recirculating over frame intervals the signal therefrom and for putting out a weighted recirculation component as at least one more input to the second OR logic means (40), the output of the second OR logic means (40) being the input having the greater amplitude of the inputs thereto.

Claim 32

A motion detector according to claim 27 or 28, wherein the threshold is adapted to put out the absolute value above the predetermined threshold which results in a motion detection value having an onset established in a range between 2 to 5 IRE units.

Claim 33

A motion detector according to claim 29, wherein the first OR logic means (76) puts out a motion detection value which is substantially linear and reaches a full-on value in a range between 5 and 15 IRE units.

Claim 34

A motion detector according to claim 28, 29 or 30, wherein the recirculation loop means (44, 50, 58, 60) comprises the frame delay (50), a threshold and limiting means (58), a first amplifier means (60) having a predetermined coefficient of amplification lying in a range between zero to unity, and summing junction means (44) connected at the output of the sign removal means, the output from the summing junction means (44) providing the second input to the second OR logic means (40).

Claim 35

A motion detector according to claim 31, comprising second amplifier means (46) connected between the output of the summing junction means and the second input to the second OR logic means (40), the second amplifier means (46) having a predetermined coefficient of amplification lying in a range between zero and unity.