← Back to Patent Explorer
EP0386779A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

MOS field-effect transistor having a high breakdown voltage

Assignee: Toshiba Corp
•
Filing: 1990-03-09
•
Granted: —
•
Expires: 2010-03-09
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device comprises a semiconductor substrate (1) of a first conductivity type, a first well (2) of a second conductivity type formed on the semiconductor substrate (1) of the first conductivity type, a first impurity diffusion layer (5) of the first conductivity type formed on the well (2) without contacting the semiconductor substrate (1), a second impurity diffusion layer (6) of the second conductivity type which surrounds the first impurity diffusion layer (5) and has an impurity concentration which is higher than that of the well (2), a third impurity diffusion layer (7) of the first conductivity type formed within the second impurity diffusion layer (6) so as to contact neither the semiconductor substrate (1) nor the first impurity diffusion layer (5), a source electrode (10) connected to both the second impurity diffusion layer (6) and the third impurity diffusion layer (7), a gate electrode (12) which is formed between the first impurity diffusion layer (5) and the third impurity diffusion layer (7) and formed on the second impurity diffusion layer (6) so as to interpose an insulation film (11) therebetween, a drain electrode (9) connected to the first impurity diffusion layer (5), and a wiring layer extracted from the drain electrode (9) outside the semiconductor substrate (1).

Inventors

  • 👤 Koji C/O Intellectual Property Div. Shirai
  • 👤 Ken C/O Intellectual Property Div. Kawamura

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 22:38
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856; H10D89/00; H10D89/60; H10D89/601; H10D30/00; H10D30/60; H10D30/601; H10D30/603; H10D30/64; H10D30/65; H10D30/66; H10D30/663; H10D84/01; H10D84/0123; H10D84/0126; H10D89/211; H10D89/213; H10D62/00; H10D62/10; H10D62/124; H10D62/126; H10D62/127; H10D62/13; H10D62/149; H10D62/151; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/257

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 208 words
A semiconductor device characterized by comprising: a semiconductor substrate (1) of a first conduc­tivity type; a first well (2) of a second conductivity type formed on said semiconductor substrate of the first con­ductivity type; a first impurity diffusion layer (5) of the first conductivity type formed on said well (2) without con­tacting said semiconductor substrate (1); a second impurity diffusion layer (6) of the second conductivity type which surrounds said first impurity diffusion layer (5) and has an impurity concentration which is higher than that of said well (2); a third impurity diffusion layer (7) of the first conductivity type formed within said second impurity diffusion layer (6) so as to contact neither said semi­conductor substrate nor said first impurity diffusion layer (5); a source electrode (10) connected to both said second impurity diffusion layer (6) and said third impu­rity diffusion layer (7); a gate electrode (12) formed between said first impurity diffusion layer (5) and said third impurity diffusion layer (7) and formed on said second impurity diffusion layer (6) so as to interpose an insulation film (11) therebetween; a drain electrode (9) connected to said first impurity diffusion layer (5); and a wiring layer (43) extracted from said drain elec­trode (9) outside said semiconductor substrate (1).
Claim 2
Dependent Claim 208 words
A semiconductor device characterized by comprising: a semiconductor substrate (1) of a first conduc­tivity type; a first well (2) of a second conductivity type formed on said semiconductor substrate of the first con­ductivity type; a first impurity diffusion layer (5) of the first conductivity type formed on said well (2) without con­tacting said semiconductor substrate (1); a second impurity diffusion layer (6) of the second conductivity type which surrounds said first impurity diffusion layer (5) and has an impurity concentration which is higher than that of said well (2); a third impurity diffusion layer (7) of the first conductivity type formed within said second impurity diffusion layer (6) so as to contact neither said semi­conductor substrate nor said first impurity diffusion layer (5); a source electrode (10) connected to both said second impurity diffusion layer (6) and said third impu­rity diffusion layer (7); a gate electrode (12) formed between said first impurity diffusion layer (5) and said third impurity diffusion layer (7) and formed on said second impurity diffusion layer (6) so as to interpose an insulation film (11) therebetween; a drain electrode (9) connected to said first impurity diffusion layer (5); and a wiring layer (43) extracted from said drain elec­trode (9) outside said semiconductor substrate (1).
Claim 3
Dependent Claim 48 words
The semiconductor device according to claim 1, characterized by further comprising a fourth impurity diffusion layer (4) connected to said drain electrode (9), formed in said third impurity diffusion layer (5) and having an impurity concentration which is higher than that of said third impurity diffusion layer (5).
Claim 4
Dependent Claim 59 words
The semiconductor device according to claim 2, characterized by further comprising a fifth impurity diffusion layer (3) surrounding said fourth impurity diffusion layer (4) without contacting said second impurity diffusion layer (6) and having an impurity concentration which is higher than that of said third impurity diffusion layer (5) and lower than that of said fourth impurity diffusion layer.
Claim 5
Dependent Claim 69 words
The semiconductor device according to claim 1, characterized by further comprising a sixth impurity diffusion layer (8) of a second conductivity type sur­rounding said third impurity diffusion layer (7) and having an impurity concentration which is higher than that of said second impurity diffusion layer (6), one end of said sixth impurity diffusion layer (8) extending under one end of said gate electrode (12) under said wiring layer (43).
Claim 6
Dependent Claim 32 words
The semiconductor device according to claim 1, characterized in that said insulation film (11) has a thick portion under said gate electrode (12) and toward the side of said drain electrode (9).
Claim 7
Dependent Claim 38 words
The semiconductor device according to claim 1, characterized by further comprising: a MOS FET (100) of a second conductivity type; and a MOS FET (200) formed next to said MOS FET (100) and on said semiconductor substrate (1).
Claim 8
Dependent Claim 48 words
The semiconductor device according to claim 6, characterized by further comprising a fourth impurity diffusion layer (4) connected to said drain electrode (9), formed in said third impurity diffusion layer (5) and having an impurity concentration which is higher than that of said third impurity diffusion layer (5).
Claim 9
Dependent Claim 57 words
The semiconductor device according to claim 7, characterized by further comprising a fifth impurity diffusion layer (3) surrounding said fourth impurity diffusion layer (4) without contacting said second impurity diffusion layer (6) and having an impurity concentration which is higher than that of said third impurity diffusion layerand lower than that of said fourth impurity diffusion layer.
Claim 10
Dependent Claim 69 words
The semiconductor device according to claim 6, characterized by further comprising a sixth impurity diffusion layer (8) of a second conductivity type sur­rounding said third impurity diffusion layer (7) and having an impurity concentration which is higher than that of said second impurity diffusion layer (6), one end of said sixth impurity diffusion layer (8) extending under one end of said gate electrode (12) under said wiring layer (43).
Claim 11
Dependent Claim 32 words
The semiconductor device according to claim 6, characterized in that said insulation film (11) has a thick portion under said gate electrode (12) and toward the side of said drain electrode (9).
Claim 12
Dependent Claim 31 words
The semiconductor device according to claim 6, characterized by further comprising a MOSFET (300) of a second conductivity type and of a low breakdown voltage formed on said semiconductor substrate (1).
Claim 13
Dependent Claim 31 words
The semiconductor device according to claim 6, characterized by further comprising a MOSFET (400) of a first conductivity type and of a low breakdown voltage formed on said semiconductor substrate (1).
Claim 14
Dependent Claim 18 words
The semiconductor substrate according to claim 1, characterized in that said first conductivity type is a positive type.
Claim 15
Dependent Claim 18 words
The semiconductor substrate according to claim 1, characterized in that said first conductivity type is a negative type.
Claim 16
Dependent Claim 42 words
A semiconductor device characterized by comprising: a semiconductor substrate (1); and a plurality of impurity diffusion layers (3, 4, 5, 6, 7 and 8) formed on said semiconductor substrate (1) and having different impurity concentrations, said impu­rity diffusion layers being coaxially formed.
Claim 17
Dependent Claim 42 words
A semiconductor device characterized by comprising: a semiconductor substrate (1); and a plurality of impurity diffusion layers (3, 4, 5, 6, 7 and 8) formed on said semiconductor substrate (1) and having different impurity concentrations, said impu­rity diffusion layers being coaxially formed.
Claim 18
Dependent Claim 46 words
The semiconductor device according to claim 15, characterized in that said diffusion layers include a first MOSFET (10) of second conductivity type; further comprising a second MOSFET structure (200) of a first conductivity type formed next to said first MOSFET (100) on said semiconductor substrate (1).
Claim 19
Dependent Claim 36 words
The semiconductor device according to claim 16, characterized by further comprising a low breakdown-voltage type third MOSFET structure (300) of the second conductivity type formed next to said second MOSFET (200) on said semiconductor substrate (1).
Claim 20
Dependent Claim 35 words
The semiconductor device according to claim 16, characterized by further comprising a low breakdown voltage fourth MOSFET (400) of the first conductivity type formed next to said third MOSFET (300) on said semiconductor substrate (1).
Claim 21
Dependent Claim 18 words
The semiconductor device according to claim 16, characterized in that said first conductivity type is a positive type.
Claim 22
Dependent Claim 18 words
The semiconductor device according to claim 16, characterized in that said first conductivity type is a negative type.
Claim 23
Dependent Claim 24 words
The semiconductor device according to claim 1, characterized in that said third impurity diffusion layer (5) is formed except under said wiring layer (43).

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag