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EP0380851A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Modular crossbar interconnections in a digital computer

Assignee: Digital Equipment Corp
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Filing: 1989-09-11
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Granted: —
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Expires: 2009-09-11
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Abstract

Abstract For efficiently handling data transactions between various system units (CPUs), I/O units and main memory units) in a multi-processor system, the system units are linked via a plurality of expandable crossbar modules (32, 34) each providing a set of interconnections between the sets of input and output nodes, with each output being defined in terms of only one input. Each crossbar module is also provided with discrete input and output expansion ports through which the module may be linked to other identically configured crossbar modules when additional nodes are to be integrated into the system. The expansion ports allow serial linking of crossbar modules so as to establish a connection between source and destination nodes which are spread across different crossbar modules.

Inventors

  • 👤 Michael E. Flynn
  • 👤 Stephen R. Polzin
  • 👤 Kumar Chinnaswamy

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 03:41
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368; G06F15/17375; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4022

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 186 words
A multi-processing system of the kind having system units operated in parallel, the system units including a plurality of central processing units (CPUs) (12), at least one input/output (I/O) interface (14), at least one main memory unit (MMU) (16) and interconnection means (20) for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, characterised in that the interconnection means comprises at least two crossbar modules (32, 34), each module adapted to establish a direct path or mapping between one of a plurality of source nodes (36, 36A) and one of a plurality of destination nodes (38, 36B), the source and destination nodes provided on one crossbar module corresponding to different respective system units from those provided on other crossbar modules, each of the modules including at least one expansion source node and at least one expansion destination node through which the crossbar modules (32, 34) are connectable in such a way as to establish a data path between source nodes defined on one of the crossbar modules and destination nodes defined on another of the crossbar modules.
Claim 2
Dependent Claim 186 words
A multi-processing system of the kind having system units operated in parallel, the system units including a plurality of central processing units (CPUs) (12), at least one input/output (I/O) interface (14), at least one main memory unit (MMU) (16) and interconnection means (20) for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, characterised in that the interconnection means comprises at least two crossbar modules (32, 34), each module adapted to establish a direct path or mapping between one of a plurality of source nodes (36, 36A) and one of a plurality of destination nodes (38, 36B), the source and destination nodes provided on one crossbar module corresponding to different respective system units from those provided on other crossbar modules, each of the modules including at least one expansion source node and at least one expansion destination node through which the crossbar modules (32, 34) are connectable in such a way as to establish a data path between source nodes defined on one of the crossbar modules and destination nodes defined on another of the crossbar modules.
Claim 3
Dependent Claim 184 words
A multi-processing system as claimed in Claim 1 wherein the interconnection means (20) further comprises: (a) means for accepting control commands designating the source and destination nodes for executing a data transaction; (b) means for determining whether the designated source and destination nodes are defined on a single crossbar module or are defined on separate crossbar modules; (c) means for selectively generating a control signal to the single crossbar module containing both the source (36, 36A) and destination (38, 36B) nodes in order to establish the required data path by a direct mapping between the nodes; and (d) means for selectively generating control signals to each of the crossbar modules on which the source and destination nodes are separately defined in order to establish the required data path by an indirect mapping between the nodes, the indirect mapping being established by (1) a first sub-mapping between the designated source node and the expansion node of the crossbar module containing the source node and (ii) a second sub-mapping between the designated destination node and the expansion node of the crossbar module containing the destination node.
Claim 4
Dependent Claim 60 words
A multi-processing system as claimed in Claim 1 or Claim 2 wherein the interconnection (20) means further includes means for generating, for a selected time period, a busy signal indicating that the source node, the destination node, and the expansion nodes being used at a given time for establishing a data transaction path are unavailable for establishing other transaction paths.
Claim 5
Dependent Claim 86 words
A multi-processing system as claimed in any one of Claims 1 to 3 comprising four CPUs, two MMUs, two I/O interfaces, and one service processor unit (SPU) (22), the interconnection means comprising two crossbar modules (32, 34), each crossbar module being adapted to provide interconnections between source and destination nodes corresponding to two CPUs, one I/O interface and one MMU, and one of the crossbar modules (32) further being adapted to provide interconnections between an additional source and a destination node corresponding to the SPU (22).
Claim 6
Dependent Claim 87 words
A multi-processing system as claimed in Claim 3 or Claim 4 when dependent upon Claim 3 wherein control commands accepted by the interconnection means (20) include a size command defining the period of time for which the required transaction path needs to be established, the means provided within the interconnection means (20) for generating the busy signal generating the said signal for predefined periods of time for certain predefined data transactions, and for other data transactions generating the busy signal on the basis of the size commands.
Claim 7
Dependent Claim 60 words
A multi-processing system as claimed in any one of the preceding claims in which the expansion destination node of one module (32) is connected to the expansion source node of the other module (34), and in which the expansion destination node of the said other module (34) is connected to the expansion source node of the said one module (32).

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