EP0378423A2
Expired / Lapsed
EP
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DMA controller
Assignee: International Business Machines Corp
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Filing: 1990-01-11
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Granted: —
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Expires: 2010-01-11
Abstract
Abstract A DMA controller is described which has an attached, dedicated memory. Data objects are stored in this memory and are linked to one another, by pointers. Each data object contains DMA block transfer control parameters. A single block transfer is made up of several separate transfers, with each separate transfer defined by one data object. The single block transfer is defined by linking several data objects into a list. The DMA controller consecutively performs the transfers in a linked list without requiring control by a system central processor.
Inventors
- 👤 Richard G. Fogg, Jr.
- 👤 Joseph Richard Mathis
- 👤 James Otto Nicholson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 18:40
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A system for controlling data transfers in a digital computer having a central processor (12) between a memory (16) and another device (20), comprising: a DMA controller (18) for transferring data between the memory and the other device according to transfer control parameters in said controller; and a tag memory (22) coupled to said DMA controller, wherein said tag memory can be accessed by said DMA controller without reference to said central processor, and contains one or more objects containing transfer control parameters, and wherein, upon completion of a data transfer defined by the transfer control parameters in said DMA controller, a new set of transfer control parameters in a next object in said tag memory are transferred to said DMA controller and a new data transfer begun according to said new set of transfer control parameters.
Claim 2
Independent Claim
137 words
A system for controlling data transfers in a digital computer having a central processor (12) between a memory (16) and another device (20), comprising: a DMA controller (18) for transferring data between the memory and the other device according to transfer control parameters in said controller; and a tag memory (22) coupled to said DMA controller, wherein said tag memory can be accessed by said DMA controller without reference to said central processor, and contains one or more objects containing transfer control parameters, and wherein, upon completion of a data transfer defined by the transfer control parameters in said DMA controller, a new set of transfer control parameters in a next object in said tag memory are transferred to said DMA controller and a new data transfer begun according to said new set of transfer control parameters.
Claim 3
Dependent Claim
36 words
A system as claimed in Claim 1, wherein said DMA controller contains address (24), control (26), and count (30) registers, and the transfer control parameters include address, control and count values placed respectively into such registers.
Claim 4
Dependent Claim
50 words
A system as claimed in Claim 1 or Claim 2, wherein said digital computer includes a paged virtual memory system, and wherein a complete page frame of said virtual memory system can be transferred during one of said data transfers defined by the transfer control parameters in said DMA controller.
Claim 5
Independent Claim
42 words
A system as claimed in any preceding claim, wherein said tag memory is organized as a heap, wherein each object contains a pointer to a next object, wherein a plurality of objects which define related data transfers are linked into a list.
Claim 6
Independent Claim
117 words
A method for transferring data in a computer system, having a central processor (12) and a DMA controller (18), comprising the steps of: (a) storing one or more objects, each containing control information for a block data transfer, into a tag memory (22) associated with the DMA controller, wherein said tag memory can be accessed by said DMA controller without reference to said central processor; (b) performing a block data transfer according to control information stored in the DMA controller; (c) performing a block data transfer according to the control information contained in one of said objects; (d) repeating step (c) until block data transfers corresponding to each of said one or more objects have been performed.
Claim 7
Independent Claim
117 words
A method for transferring data in a computer system, having a central processor (12) and a DMA controller (18), comprising the steps of: (a) storing one or more objects, each containing control information for a block data transfer, into a tag memory (22) associated with the DMA controller, wherein said tag memory can be accessed by said DMA controller without reference to said central processor; (b) performing a block data transfer according to control information stored in the DMA controller; (c) performing a block data transfer according to the control information contained in one of said objects; (d) repeating step (c) until block data transfers corresponding to each of said one or more objects have been performed.
Claim 8
Dependent Claim
50 words
A method as claimed in Claim 5, wherein step (c) comprises the steps of: (c.1) transferring control information from one of said objects into control registers of the DMA controller; and (c.2) performing a block data transfer according to the control information in the control registers of the DMA controller.
Claim 9
Dependent Claim
47 words
A method as claimed in Claim 5 or Claim 6, wherein said objects are stored in the memory as a heap, wherein each object has a pointer to a next object, and wherein a plurality of objects which define related data transfers are linked into a list.
Claim 10
Independent Claim
23 words
A method as claimed in any of Claims 5 to 7, wherein said tag memory is not directly accessible by said central processor.
References Cited (Backward Citations)
No citation records indexed.
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