EP0377897A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Duty ratio control circuit apparatus
Assignee: Toshiba Corp
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Filing: 1989-12-28
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Granted: —
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Expires: 2009-12-28
Abstract
Abstract An integrating circuit (1) integrates an input signal. When an output from the integrating circuit (1) is input to an AC coupling circuit (2), only an AC component of the output is extracted. The AC component which passes through the AC coupling circuit (2) is waveshaped and coverted into a rectangular wave by a waveshaping circuit (3). The duty ratio of the waveshaped rectangular wave is detected by a duty ratio detecting circuit (4). A voltage corresponding to the duty ratio is then generated and fed back to the output of the AC coupling circuit (2) through a feedback circuit (5). As a result, a DC bias component is applied to the AC component which has passed through the AC coupling circuit (2). In this case, the voltage generated by the duty ratio detecting circuit (4) is controlled to coincide with the circuit threshold value of the waveshaping circuit (3), and a rectangular wave having a duty ratio of 50% is output from the waveshaping circuit (3).
Inventors
- 👤 Nobutaka Intellectual Property Division Kitagawa
- 👤 Hiroki Intellectual Property Division Muroga
- 👤 Tomotaka Intellectual Property Division Saito
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 12:53
CPC Classifications
H; H03; H03K; H03K3/00; H03K5/00; H03K5/156; H03K5/1565
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
106 words
A duty ratio control circuit apparatus comprising: an integrating circuit (1) for integrating an input signal; an AC coupling circuit (2) for allowing an AC component of an output from said integrating circuit to pass therethrough; a waveshaping circuit (3) for waveshaping an output from said AC coupling circuit and extracting a duty-converted output signal; a duty ratio detecting circuit (4) for receiving a waveshaped output from said waveshaping circuit and generating a voltage corresponding to a duty of the output; and a feedback circuit (5) for feeding back an output from said duty ratio detecting circuit to an output side of said AC coupling circuit.
Claim 2
Dependent Claim
106 words
A duty ratio control circuit apparatus comprising: an integrating circuit (1) for integrating an input signal; an AC coupling circuit (2) for allowing an AC component of an output from said integrating circuit to pass therethrough; a waveshaping circuit (3) for waveshaping an output from said AC coupling circuit and extracting a duty-converted output signal; a duty ratio detecting circuit (4) for receiving a waveshaped output from said waveshaping circuit and generating a voltage corresponding to a duty of the output; and a feedback circuit (5) for feeding back an output from said duty ratio detecting circuit to an output side of said AC coupling circuit.
Claim 3
Dependent Claim
41 words
An apparatus according to claim 1, characterized in that said duty ratio detecting circuit (4) generates a voltage corresponding to a difference between a duty ratio of 50% and a duty ratio of the waveshaped output from said waveshaping circuit (3).
Claim 4
Dependent Claim
78 words
An apparatus according to claim 2, characterized in that said duty ratio detecting circuit (4) comprises: a first integrating circuit (15) for receiving a first waveshaped output (S₄) from said waveshaping circuit (3); a second integrating circuit (16) for receiving a second waveshaped output (S₅) having an inverted relationship with the first waveshaped output from said waveshaping circuit; and a comparing circuit (19; 19′) for receiving and comparing outputs from said first and second integrating circuits (15, 16).
Claim 5
Dependent Claim
27 words
An apparatus according to claim 3, characterized in that a low-pass filter circuit (23) is further connected to an output terminal of said comparing circuit (19; 19′).
Claim 6
Dependent Claim
57 words
An apparatus according to claim 4, characterized in that said duty ratio detecting circuit (4) further comprises a DC bias generating circuit (22) for applying a predetermined DC bias to an input terminal of said comparing circuit (19; 19′) to which an output (S₇) from one of said first and second integrating circuits (15, 16) is supplied.
Claim 7
Dependent Claim
26 words
An apparatus according to claim 5, characterized in that said DC bias generating circuit (22) comprises a inverter circuit (22) having short-circuited input and output terminals.
Claim 8
Dependent Claim
174 words
An apparatus according to claim 1, characterized in that said waveshaping circuit (3) comprises a plurality of series-connected first inverter circuits (14-1 - 14-6); and said duty ratio detecting circuit (4) comprises: a first integrating circuit (15) for receiving a first waveshaped output (S₄) from said waveshaping circuit (3), a second integrating circuit (16) for receiving a second waveshaped output (S₅) having an inverted relationship with the first waveshaped output from said waveshaping circuit (3), a comparing circuit (19; 19′) for receiving and comparing outputs from said first and second integrating circuits (15, 16), and a DC bias generating circuit (22), constituted by a second inverter circuit (22) having short-circuited input and output terminals, a circuit threshold value of said second inverter circuit being set to be equal to that of a first-stage inverter circuit of said first inverter circuits (14-1), said DC bias generating circuit applying a predetermined DC bias voltage to an input terminal to which an output (S₇) from one of said first and second integrating circuits (15, 16) is supplied.
Claim 9
Dependent Claim
90 words
An apparatus according to claim 7, characterized in that each of said first-stage inverter circuit (14-1) of said plurality of first inverter circuits in said waveshaping circuit (3) and said second inverter circuit (22) constituting said DC bias generating circuit (22) comprises p-channel and n-channel MOS transistors (33, 34), geometrical size ratios of said p-channel and n-channel MOS transistors of said first and second inverter circuits being matched with each other so as to cause circuit threshold values of said first and second inverter circuits to coincide with each other.
Claim 10
Dependent Claim
21 words
An apparatus according to claim 1, characterized in that all of said circuits are formed on a single semiconductor substrate (81).
Claim 11
Dependent Claim
31 words
An apparatus according to claim 1, characterized in that all of said circuits are formed on the same semiconductor substrate (81) as that of semiconductor IC apparatus (83) for a microcomputer.
Claim 12
Dependent Claim
32 words
An apparatus according to claim 9, characterized in that all of said circuits are formed on the same semiconductor substrate (81) as that of a semiconductor IC apparatus (83) for a microcomputer.
Claim 13
Dependent Claim
47 words
An apparatus according to claim 1, characterized in that an output from a quartz oscillating circuit (6) is supplied, as said input signal, to said integrating circuit (1), and an output signal from said waveshaping circuit is supplied, as a fundamental clock, to a timing circuit (7).
Claim 14
Dependent Claim
47 words
An apparatus according to claim 9, characterized in that an output from a quartz oscillating circuit (6) is supplied, as said input signal, to said integrating circuit (1), and an output signal from said waveshaping circuit is supplied, as a fundamental clock, to a timing circuit (7).
Claim 15
Dependent Claim
40 words
An apparatus according to claim 1, characterized in that said duty ratio detecting circuit (4) generates a voltage corresponding to a difference between a predetermined duty ratio and a duty ratio of a waveshaped output from said waveshaping circuit (3).
Claim 16
Dependent Claim
77 words
An apparatus according to claim 14, characterized in that said duty ratio detecting circuit (4) comprises: a first integrating circuit (16) for receiving a waveshaped output (S₅) from said waveshaping circuit (3); a DC voltage generating circuit (50) for generating a predetermined DC voltage by dividing a power source voltage; and a comparing circuit (19) for comparing an output from said first integrating circuit (16) with the DC voltage generated by said DC voltage generating circuit (50).
Claim 17
Dependent Claim
26 words
An apparatus according to claim 15, characterized in that a low-pass filter circuit (23) is further connected to an output terminal of said comparing circuit (19).
Claim 18
Dependent Claim
129 words
A microcomputer system comprising: an oscillating circuit (6); an integrating circuit (1) for integrating an output from said oscillating circuit (6); an AC coupling circuit (2) for allowing an AC component of an output from said integrating circuit to pass therethrough; a waveshaping circuit (3) for waveshaping an output from said AC coupling circuit and extracting a duty-converted output signal; a duty ratio detecting circuit (4) for receiving a waveshaped output from said waveshaping circuit and generating a voltage corresponding to a duty of the output; a feedback circuit (5) for feeding back an output from said duty ratio detecting circuit to an output side of said AC coupling circuit; and a microcomputer (83) for receiving the duty-converted output extracted by said waveshaping circuit (3) as a fundamental clock.
Claim 19
Dependent Claim
129 words
A microcomputer system comprising: an oscillating circuit (6); an integrating circuit (1) for integrating an output from said oscillating circuit (6); an AC coupling circuit (2) for allowing an AC component of an output from said integrating circuit to pass therethrough; a waveshaping circuit (3) for waveshaping an output from said AC coupling circuit and extracting a duty-converted output signal; a duty ratio detecting circuit (4) for receiving a waveshaped output from said waveshaping circuit and generating a voltage corresponding to a duty of the output; a feedback circuit (5) for feeding back an output from said duty ratio detecting circuit to an output side of said AC coupling circuit; and a microcomputer (83) for receiving the duty-converted output extracted by said waveshaping circuit (3) as a fundamental clock.
Claim 20
Dependent Claim
41 words
A system according to claim 17, characterized in that said duty ratio detecting circuit (4) generates a voltage corresponding to a difference between a duty ratio of 50% and a duty ratio of the waveshaped output from said waveshaping circuit (3).
Claim 21
Dependent Claim
77 words
A system according to claim 18, characterized in that said duty ratio detecting circuit (4) comprises: a first integrating circuit (15) for receiving a first waveshaped output (S₄) from said waveshaping circuit (3); a second integrating circuit (16) for receiving a second waveshaped output (S₅) having an inverted relationship with the first waveshaped output from said waveshaping circuit; and a comparing circuit (19) for receiving and comparing outputs from said first and second integrating circuits (15, 16).
Claim 22
Dependent Claim
26 words
A system according to claim 19, characterized in that a low-pass filter circuit (23) is further connected to an output terminal of said comparing circuit (19).
Claim 23
Dependent Claim
56 words
A system according to claim 19, characterized in that said duty ratio detecting circuit (4) further comprises a DC bias generating circuit (22) for applying a predetermined DC bias to an input terminal of said comparing circuit (19) to which an output (S₇) from one of said first and second integrating circuits (15, 16) is supplied.
Claim 24
Dependent Claim
26 words
A system according to claim 21, characterized in that said DC bias generating circuit (22) comprises a inverter circuit (22) having short-circuited input and output terminals.
Claim 25
Dependent Claim
172 words
A system according claim 17, characterized in that said waveshaping circuit (3) comprises a plurality of series-connected first inverter circuits (14-1 - 14-6); and said duty ratio detecting circuit (4) comprises: a first integrating circuit (15) for receiving a first waveshaped output (S₄) from said waveshaping circuit (3), a second integrating circuit (16) for receiving a second waveshaped output (S₅) having an inverted relationship with the first waveshaped output from said waveshaping circuit (3), a comparing circuit (19) for receiving and comparing outputs from said first and second integrating circuits (15, 16), and a DC bias generating circuit (22), constituted by a second inverter circuit (22) having short-circuited input and output terminals, a circuit threshold value of said second inverter circuit being set to be equal to that of a first-stage inverter circuit of said first inverter circuits (14-1), said DC bias generating circuit applying a predetermined DC bias voltage to an input terminal to which an output (S₇) from one of said first and second integrating circuits (15, 16) is supplied.
Claim 26
Dependent Claim
90 words
A system according to claim 23, characterized in that each of said first-stage inverter circuit (14-1) of said plurality of first inverter circuits in said waveshaping circuit (3) and said second inverter circuit (22) constituting said DC bias generating circuit (22) comprises p-channel and n-channel MOS transistors (33, 34), geometrical size ratios of said p-channel and n-channel MOS transistors of said first and second inverter circuits being matched with each other so as to cause circuit threshold values of said first and second inverter circuits to coincide with each other.
Claim 27
Dependent Claim
27 words
A system according to claim 17, characterized in that all of said circuits except for said oscillating circuit (6) are formed on a single semiconductor substrate (81).
References Cited (Backward Citations)
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