Method for manufacturing a BI-CMOS device

Claim 1

1) In a process for the simultaneous production of vertical NPN and PNP bipolar transistors and comple­mentary field effect transistors on a common P-doped epitaxial layer wherein said substrate has an epi layer grown on its surface and said substrate has formed at selected locations N+ subcollector areas which subcollectors are oxidized to a different height for alignment of subsequent masks and said substrate has also formed therein P+ subcollectors at selected locations for providing a low resistance path to the substrate, the improvement to the pro­cess comprising the steps of: a) growing/depositing a thin oxide and nitride layer on the surface of said wafer and deposit­ing an oxide layer onto said nitride layer, b) patterning said oxide/nitride/oxide layer to locate the surface isolation areas, c) masking said n well regions, d) implanting n type dopant at the exposed regions to form a device guard ring, e) removing the exposed oxide layer and implanting n type dopant to adjust the threshold voltage, f) removing the n well resist mask and repeating steps c-e for the P well for the n/FET and PNP substituting P type dopant for the n-type dopant, and then removing the P well resist, g) oxidizing the field, removing the nitride/pad oxide layer and growing a gate oxide, h) blanket depositing a layer of LPCVD polysilicon, i) masking said polysilicon with resist and selectively etching said polysilicon down to the gate oxide in the bipolar emitter region and collector reach-through region, j) implanting an n-type pedestal collector in said opened locations, k) etching back the photoresist, l) implanting P type dopant into the bipolar base well, m) removing the photoresist mask, n) repeating steps g-m for the opposite type of bipolar device substituting P type dopant for the n type dopant, o) removing the gate oxide layer, p) depositing a second layer of polysilicon on the surface, q) doping the polysilicon, r) patterning the polysilicon to form the gate electrodes and polysilicon emitter contacts whereby a recess is produced at the surface adjacent to the emitter contact, and s) forming the respective p type and n type reach-through, extrinsic base, and source and drain using photoresist masks and implanting the respective dopant in the predetermined regions.