Image size reduction circuit for reducing ordinary-sized image into smaller area

Claim 1

An image squeezing circuit operative to produce an output image carrying signal for reproducing a small-sized image on the basis of an input image carrying signal for being capable of reproducing an ordinary-sized image an m times larger than the small-sized image where m is an integer equal to or greater than two, characterized by a combination of: a) a separating section supplied with said input image carry­ing signal and operative to produce an analog luminance signal and an analog chrominance subcarrier signal; b) a color subcarrier producing section supplied with said input image carrying signal and operative to produce a color subcarrier signal which is of a periodical signal; c) a timing signal producing section operative to produce a first sampling clock signal an n times larger in frequency than said color subcarrier signal and appearing in every m intervals of said color subcarrier signal where n is an integer equal to or greater than three, a second sampling signal n / m times larger in frequency than the color subcarrier signal and a high frequency periodical signal n times larger in frequency than the color subcarrier signal; d) a first decimating section supplied with said analog chrominance subcarrier signal and responsive to said first sam­pling signal for producing a decimated digital chrominance sig­ nal, said decimated digital chrominance signal being delivered therefrom in response to said high frequency periodical signal; e) a second decimating section supplied with said analog luminance signal and responsive to said second sampling signal for producing a decimated digital luminance signal, said decimat­ed digital luminance signal being delivered therefrom in the presence of said high frequency periodical signal; and f) an output section supplied with said decimated digital chrominance signal and said decimated digital luminance signal and operative to produce said output image carrying signal.