Signal processing circuit for a solid-state image pickup device

Claim 2

A signal processing circuit for a solid-state image pickup device comprising analog-to-digital converting means (6) for digitizing image pickup output signals read out at a sampling rate fs from a solid-state image sensor (4G) for green-color image pickup, a solid-state image sensor (4R) for red-color image pickup and a solid-state image sensor (4B) for blue-color image pickup of an image pickup section (1-4), at a clock rate equal to a sampling rate fs, said solid-state image sensor (4G) for green-color image pickup being arrayed with a spatial shift by one half the pixel arraying pitch with respect to said solid-state image sensors (4R, 4B) for red-­color and blue-color image pickup, and interpolating filter (7, 8) means for performing sampling phase conversion for coinciding the sampling phase of the image pickup output signals digitized by said analog-to-di­gital converting means (6) and having the clock rate fs, whereby the image pickup output signals having a coincident sampling phase are formed at the same clock rate as that of said analog-to-digital converting means (6).

Claim 3

The signal processing circuit according to claim 1, wherein said interpolating filter means (7, 8) is formed by a digital filter defined by the same clock rate as the clock rate of said analog-to-digital converting means (6), said digital filter (7) having a single zero in fs/2 with respect to the green-color image pickup output signal or the red-color image pickup output signal and the blue-color image pickup output signal and having a passband in the range from 0 to fs/2.

Claim 4

The signal processing circuit according to claim 1 or 2, wherein said interpolating filter means (7) performs sampling phase conversion of the greencolor image pickup output signal o digitized by said analog-to-digital converting means (4G).

Claim 5

The signal processing circuit according to claim 1 or 2, wherein said interpolating filter means (8) performs sampling phase conversion of the red-color and blue-color image pickup output signals digitized by said analog-to-digital converting means (4R, 4B).

Claim 6

A signal processing circuit for a solid-state image pickup device comprising analog-to-digital converting means (36) for digitizing image pickup output signals read out at a sampling rate fs from a solid-state image sensor (4G) for green-color image pickup, a solid-state image sensor (4R) for red-color image pickup and a solid-state image sensor (4B) for bluecolor image pickup of an image pickup section, at a clock rate equal to a sampling rate fs, said solid-state image sensor (4G) for green-color image pickup being arrayed with a spatial shift by one half the pixel arraying pitch with respect to said solid-state image sensors for red-color and blue-color image pickup (4R, 4B), signal processing means (37) for processing digital output signals from said analog-to-digital converting means (36), a color encoder (38) supplied with output signals from said signal processing means (37) and adapted for producing digital composite video signals, a digital low pass filter (83-86) adapted to operate at least a portion of said color encoder (38) and said signal processing means (37) at a clock rate 2fs twice as high as the sampling rate fs, said digital low pass filter (83-86) being supplied with a digital composite video signal at a clock rate of 2fs from said color encoder (38) and adapted to have a bandpass of not more than about fs/2, and rate converting means (87, 88, 89) supplied with an output from said digital low pass filter (83-86) and adapted to b reduce the clock rate to fs, said rate converting means (87, 88, 89) allowing to produce digital composite video signal signals at the clock rate fs.

Claim 7

A signal processing circuit for a solid-state image pickup device comprising analog-to-digital converting means (36) for digitizing image pickup output signals read out at a sampling rate fs from a solid-state image sensor (4G) for green-color image pickup, a solid-state image sensor (4R) for red-color image pickup and a solid-state image sensor (4B) for bluecolor image pickup of an image pickup section, at a clock rate equal to a sampling rate fs, said solid-state image sensor (4G) for green-color image pickup being arrayed with a spatial shift by one half the pixel arraying pitch with respect to said solid-state image sensors for red-color and blue-color image pickup (4R, 4B), signal processing means (37) for processing digital output signals from said analog-to-digital converting means (36), a color encoder (38) supplied with output signals from said signal processing means (37) and adapted for producing digital composite video signals, a digital low pass filter (83-86) adapted to operate at least a portion of said color encoder (38) and said signal processing means (37) at a clock rate 2fs twice as high as the sampling rate fs, said digital low pass filter (83-86) being supplied with a digital composite video signal at a clock rate of 2fs from said color encoder (38) and adapted to have a bandpass of not more than about fs/2, and rate converting means (87, 88, 89) supplied with an output from said digital low pass filter (83-86) and adapted to b reduce the clock rate to fs, said rate converting means (87, 88, 89) allowing to produce digital composite video signal signals at the clock rate fs.

Claim 8

The signal processing circuit according to claim 5 further comprising interpolating filter means (88) for converting the clock rate fs of the image pickup output signals digitized by said analog-to-digital converting means (36) into the clock rate 2fs which is twice the clock rate fs.

Claim 9

The signal processing circuit according to claim 5 or 6, wherein said signal processing means comprises a gamma correction circuit (74) for gamma correcting the image pickup output signals formed by said interpolating filter means at the clock rate 2fs.

Claim 10

The signal processing circuit according to any of claims 5 to 7, wherein said signal processing means comprises an image enhancement section (76) for performing signal 20 enhancement for the image pickup output signals formed by said interpolating filter means at the clock rate of 2fs.

Claim 11

The signal processing circuit according to any of claims 5 to 8 further comprising digital-to-analog converting means (39) for producing analog composite video signals by digital-to-analog conversion of the digital composite video signals from the color encoder (38) at the clock rate 2fs. 10. A color television camera comprising a main body of the camera including a plurality of solid-state image sensors (4), analog-to-digital converting means (36) for digitizing image pickup output signals read out from said solid-state image sensors (4) at the sampling rate fs at a clock rate equal to the sampling rate fs, signal processing means (37) for processing the digital output signals of said analog-to-digital converting means (36), a digital color encoder (38) supplied with output signals from said signal processing means (37) and adapted to produce digital composite video signals at the clock rate of 2fs, and an output terminal (40) for outputting said digital compo­site video signals at the clock rate of 2fs, and a camera adapter separably connected to said main body of the camera and comprising, a digital low pass filter (83-86) supplied with said digi­tal composite video signals from the output terminal of said main body and having a passband of not more than about fs/2, and rate converting means (87, 88, 89) supplied with the output of said digital low pass filter (83-86) and adapted to reduce the clock rate to fs.