EP0367450A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Charge-retaining signal boosting circuit and method
Assignee: Texas Instruments Inc
•
Filing: 1989-10-19
•
Granted: —
•
Expires: 2009-10-19
Abstract
Abstract During an active phase of operation of the circuit (70), a gate (38) of a transistor (14) is boosted to a first voltage level that is substantially above the voltage supply level (Vdd). After the gate (38) is boosted, the signal node (12) is boosted by transmitting current through the current path of the transistor (14) from a first electrode (16) of a boosting capacitor (18). During a reset phase of operation of the circuit (70), a second electrode (26) of the capacitor (18) is discharged. This causes the withdrawal of charge from the signal node (12) through the current path of the transistor (14) to the first electrode (16) of the boosting capacitor (18). A predetermined voltage level near the voltage supply level is established across the electrodes (16, 26) of the boosting capacitor (18) in response to this. Finally, the transistor gate (38) is discharged to isolate the boosting capacitor (18) from the node (12), such that the desired voltage level is maintained across the boosting capacitor (18) for an extended length of time.
Inventors
- 👤 Andrew M. Love
- 👤 David V. Kersh, Iii
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 15:39
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/408; G11C11/4085; G11C5/00; G11C5/14; G11C5/145
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
157 words
Apparatus for preserving a predetermined voltage level near a voltage supply level on a boosting capacitor, comprising: a transistor having a current path and a gate, said current path operable to couple a first electrode of a boosting capacitor to a signal node; first circuitry for boosting the node to a boosted level above the voltage supply level; second circuitry for discharging a second electrode of the boosting capacitor to a first voltage level, such that charge is withdrawn through the transistor to said first electrode and a second voltage level exists on said first electrode, said capacitor storing a predetermined voltage level substantially equivalent to the difference between said first and second voltage levels; and third circuitry for discharging said gate to below a threshold voltage of said transistor, such that said capacitor is isolated from said node and such that said predetermined voltage level is maintained on said capacitor for an extended period of time.
Claim 2
Dependent Claim
157 words
Apparatus for preserving a predetermined voltage level near a voltage supply level on a boosting capacitor, comprising: a transistor having a current path and a gate, said current path operable to couple a first electrode of a boosting capacitor to a signal node; first circuitry for boosting the node to a boosted level above the voltage supply level; second circuitry for discharging a second electrode of the boosting capacitor to a first voltage level, such that charge is withdrawn through the transistor to said first electrode and a second voltage level exists on said first electrode, said capacitor storing a predetermined voltage level substantially equivalent to the difference between said first and second voltage levels; and third circuitry for discharging said gate to below a threshold voltage of said transistor, such that said capacitor is isolated from said node and such that said predetermined voltage level is maintained on said capacitor for an extended period of time.
Claim 3
Dependent Claim
205 words
Apparatus for boosting a node to a first voltage level substantially above a voltage supply level, comprising: a transistor having a control electrode; a boosting capacitor for being coupled through said transistor; a first circuit for boosting said control electrode to a voltage level above said voltage supply level at a first time; a second circuit operable in conjunction with said boosting capacitor for boosting said node to said first voltage level by raising the voltage level of a first electrode of said boosting capacitor to a second voltage level at a second time after said first time; a third circuit for discharging said first electrode to a voltage level lower than said second voltage level at a third time after said second time, such that charge will be withdrawn from said node through said transistor to establish a third voltage level near said voltage supply level across said boosting capacitor electrodes; and a fourth circuit for discharging said control electrode of said transistor to a voltage level below the threshold voltage of said transistor at a fourth time following said third time, such that a level near said third voltage level will be maintained across said boosting capacitor for an extended period of time.
Claim 4
Dependent Claim
205 words
Apparatus for boosting a node to a first voltage level substantially above a voltage supply level, comprising: a transistor having a control electrode; a boosting capacitor for being coupled through said transistor; a first circuit for boosting said control electrode to a voltage level above said voltage supply level at a first time; a second circuit operable in conjunction with said boosting capacitor for boosting said node to said first voltage level by raising the voltage level of a first electrode of said boosting capacitor to a second voltage level at a second time after said first time; a third circuit for discharging said first electrode to a voltage level lower than said second voltage level at a third time after said second time, such that charge will be withdrawn from said node through said transistor to establish a third voltage level near said voltage supply level across said boosting capacitor electrodes; and a fourth circuit for discharging said control electrode of said transistor to a voltage level below the threshold voltage of said transistor at a fourth time following said third time, such that a level near said third voltage level will be maintained across said boosting capacitor for an extended period of time.
Claim 5
Dependent Claim
87 words
The apparatus of Claim 2, wherein said first circuit comprises a second capacitor, a first electrode of said second capacitor coupled to said control electrode of said transistor, a second electrode of said second capacitor selectively coupled to a voltage supply; said first circuit operable to connect said voltage supply to said second electrode of said second capacitor at said first time such that said first electrode of said second capacitor and said control electrode are capacitively coupled to said voltage level above said voltage supply level.
Claim 6
Dependent Claim
59 words
The apparatus of Claim 3, wherein said first circuit further comprises a discharge circuit for discharging said second electrode of said second capacitor at a time not after said fourth time, such that said control electrode of said transistor and said first electrode of said second capacitor become capacitively coupled down to a voltage level near said supply level.
Claim 7
Dependent Claim
72 words
The apparatus of Claim 2, wherein a cycle of operation of said apparatus includes active and reset phases, a voltage level being retained by said boosting capacitor after said control electrode of said transistor has been discharged by said fourth circuit during said reset phase, the last said voltage level persisting until said second circuit raises the voltage level of said boosting capacitor during the active phase of the next operation cycle.
Claim 8
Dependent Claim
71 words
The apparatus of Claim 2, wherein said second circuit comprises a voltage supply and a switch for selectively coupling said voltage supply to said first electrode of said boosting capacitor, said switch operable to connect said voltage supply to said first electrode of said boosting capacitor at a time not before said second time, such that a second electrode of said boosting capacitor is boosted to above said voltage supply level.
Claim 9
Dependent Claim
19 words
The apparatus of Claim 2, wherein said first electrode of said boosting capacitor is discharged to about zero volts.
Claim 10
Dependent Claim
21 words
The apparatus of Claim 2, wherein said first voltage level is approximately 1.5 times the magnitude of said voltage supply level.
Claim 11
Dependent Claim
23 words
The apparatus of Claim 2, wherein said node is a conductor for transmitting a drive/boot signal to a plurality of row line circuits.
Claim 12
Dependent Claim
29 words
The apparatus of Claim 2, and further comprising a fifth circuit for charging a second electrode of said boosting capacitor to said voltage supply level before said second time.
Claim 13
Dependent Claim
20 words
The apparatus of Claim 2, and further comprising a sixth circuit for charging said node to said voltage supply level.
Claim 14
Dependent Claim
29 words
The apparatus of Claim 2, wherein said first circuit is operable to bring said control electrode of said transistor to said supply voltage level prior to the boosting thereof.
Claim 15
Dependent Claim
17 words
The apparatus of Claim 2, and further comprising circuitry for discharging said node after said fourth time.
Claim 16
Dependent Claim
371 words
In an integrated circuit, apparatus for preserving substantially a full voltage supply level on a boosting capacitor during a reset phase of operation, said boosting capacitor operable to boost a node above said voltage supply level, the apparatus comprising; a transistor having a current path for selectively coupling a first electrode of said boosting capacitor to said node to boost said node to above said voltage supply level; a second capacitor having first and second electrodes, a gate of said transistor coupled to said first electrode of said second capacitor for selectively boosting said gate above said voltage supply level; first circuitry coupled to said first electrode of said boosting capacitor for impressing said voltage supply level thereon; second circuitry for selectively charging said second electrode of said boosting capacitor to said voltage supply level in order to boost the voltage at said first electrode of said boosting capacitor to above said voltage supply level by capacitive coupling, and for discharging the second electrode of said boosting capacitor in order to capacitively couple said first electrode of said boosting capacitor back to a voltage level near said voltage supply level; third circuitry for selectively charging said second electrode of said second capacitor to said voltage supply to capacitively couple said first electrode of said second capacitor to a voltage level above said voltage supply level, and for discharging the last said second electrode to ground to capacitively couple said first electrode of said second capacitor back to a level near its level before being coupled above said voltage supply level; fourth circuitry for selectively charging said first electrode of said second capacitor to said voltage supply level and discharging said first electrode of said second capacitor to ground; and a controller for operating said second, third and fourth circuitry such that, in a reset phase of operation, said second electrode of said boosting capacitor is discharged before the discharge of said gate, and such that charge will be drawn through said current path of said transistor from said node to said first electrode of said boosting capacitor and cause said boosting capacitor to retain a voltage level near said voltage supply level after said gate of said transistor has been discharged.
Claim 17
Dependent Claim
371 words
In an integrated circuit, apparatus for preserving substantially a full voltage supply level on a boosting capacitor during a reset phase of operation, said boosting capacitor operable to boost a node above said voltage supply level, the apparatus comprising; a transistor having a current path for selectively coupling a first electrode of said boosting capacitor to said node to boost said node to above said voltage supply level; a second capacitor having first and second electrodes, a gate of said transistor coupled to said first electrode of said second capacitor for selectively boosting said gate above said voltage supply level; first circuitry coupled to said first electrode of said boosting capacitor for impressing said voltage supply level thereon; second circuitry for selectively charging said second electrode of said boosting capacitor to said voltage supply level in order to boost the voltage at said first electrode of said boosting capacitor to above said voltage supply level by capacitive coupling, and for discharging the second electrode of said boosting capacitor in order to capacitively couple said first electrode of said boosting capacitor back to a voltage level near said voltage supply level; third circuitry for selectively charging said second electrode of said second capacitor to said voltage supply to capacitively couple said first electrode of said second capacitor to a voltage level above said voltage supply level, and for discharging the last said second electrode to ground to capacitively couple said first electrode of said second capacitor back to a level near its level before being coupled above said voltage supply level; fourth circuitry for selectively charging said first electrode of said second capacitor to said voltage supply level and discharging said first electrode of said second capacitor to ground; and a controller for operating said second, third and fourth circuitry such that, in a reset phase of operation, said second electrode of said boosting capacitor is discharged before the discharge of said gate, and such that charge will be drawn through said current path of said transistor from said node to said first electrode of said boosting capacitor and cause said boosting capacitor to retain a voltage level near said voltage supply level after said gate of said transistor has been discharged.
Claim 18
Dependent Claim
15 words
The apparatus of Claim 16, wherein said integrated circuit comprises a dynamic random access memory.
Claim 19
Dependent Claim
23 words
The apparatus of Claim 16, wherein said node is coupled to a row line in turn coupled to a plurality of memory cells.
Claim 20
Dependent Claim
43 words
The apparatus of Claim 16, wherein said full voltage supply level is about five volts, said boosting capacitor operable to retain a voltage level of about 4.5 volts after said gate of said transistor has been discharged in said reset phase of operation.
Claim 21
Dependent Claim
71 words
The apparatus of Claim 16, wherein a cycle of operation of said apparatus includes active and reset phases, a voltage level being retained by said boosting capacitor after said gate of said transistor has been discharged during said reset phase of operation the last said voltage level persisting until said first and second circuitry raise the voltage level of said boosting capacitor during the active phase of the next operation cycle.
Claim 22
Independent Claim
161 words
A method for preserving a predetermined voltage level near a voltage supply level on a boosting capacitor for boosting a node, comprising the steps of: boosting the node to a boosted level substantially above the voltage supply level; discharging a second electrode of the capacitor to a first voltage level; withdrawing charge from the node through a transistor to a first electrode of the boosting capacitor responsive to said step of discharging the second electrode thereby establishing a second voltage level on the first electrode, the first voltage level being chosen such that the difference between the first voltage level and the second voltage level is equal to or slightly greater than the predetermined voltage level; and thereafter discharging the gate of the transistor to a voltage level below the threshold voltage of the transistor to isolate the boosting capacitor from the node, such that the predetermined voltage level is maintained across the boosting capacitor for an extended length of time.
Claim 23
Independent Claim
161 words
A method for preserving a predetermined voltage level near a voltage supply level on a boosting capacitor for boosting a node, comprising the steps of: boosting the node to a boosted level substantially above the voltage supply level; discharging a second electrode of the capacitor to a first voltage level; withdrawing charge from the node through a transistor to a first electrode of the boosting capacitor responsive to said step of discharging the second electrode thereby establishing a second voltage level on the first electrode, the first voltage level being chosen such that the difference between the first voltage level and the second voltage level is equal to or slightly greater than the predetermined voltage level; and thereafter discharging the gate of the transistor to a voltage level below the threshold voltage of the transistor to isolate the boosting capacitor from the node, such that the predetermined voltage level is maintained across the boosting capacitor for an extended length of time.
Claim 24
Dependent Claim
87 words
The method of Claim 24, and further including the steps of: raising a second electrode of a second capacitor to the voltage supply level; in response to said step of raising the second electrode, boosting the voltage level of a first electrode of the second capacitor to a boosted level above the voltage supply level; and transmitting the boosted level from the first electrode of the second capacitor to the gate of the transistor such that the current may flow from the boosting capacitor to the node.
Claim 25
Dependent Claim
31 words
The method of Claim 25, and further comprising the step of bringing the voltage level of the gate to the voltage supply level prior to said step of boosting the gate.
Claim 26
Dependent Claim
51 words
The method of Claim 24, wherein said step of boosting the node further comprises the step of raising the voltage level of a second electrode of the boosting capacitor to the voltage supply level in order to boost the voltage level of the first electrode thereof above the voltage supply level.
Claim 27
Dependent Claim
38 words
The method of Claim 24, and further comprising the steps of: bringing the node to the voltage supply level; and subsequently boosting the gate of the transistor to permit the boosted level to be transferred to the node.
Claim 28
Dependent Claim
32 words
The method of Claim 24, and further comprising the step of bringing the first electrode of the boosting capacitor to the voltage supply level prior to said step of boosting the node.
Claim 29
Dependent Claim
22 words
The method of Claim 24, and further comprising the step of discharging the node after said step of discharging the transistor gate.
Claim 30
Independent Claim
428 words
A method for boosting a node to a first voltage level above a voltage supply level in an integrated circuit, comprising the steps of: during an active phase of operation, bringing the potential at a gate of a transistor to the voltage supply level at a first time; bringing the potential of a first electrode of a boosting capacitor to the voltage supply level at a second time; bringing the potential of a second electrode of a second capacitor having a first electrode coupled to the gate to the voltage supply level at a third time after the first time; boosting the potential of the first electrode of the second capacitor and of the gate to a voltage level near the first voltage level in response to said step of bringing the potential of the second electrode thereof to the voltage supply level; fully coupling the first electrode of the boosting capacitor through a current path of the transistor to the node in response to said step of boosting the potential of the gate; raising the potential of a second electrode of the boosting capacitor to the voltage supply level after the second time; boosting the potential of the first electrode of the boosting capacitor to about the first voltage level in response to said step of bringing the potential of the second electrode of the boosting capacitor to the voltage supply level; boosting the node to the first level in response to said steps of fully coupling and of boosting the first electrode of the boosting capacitor; during a reset phase of operation after said step of boosting the node, discharging the second electrode of the boosting capacitor to a second voltage level substantially lower than the voltage supply level; decreasing the voltage on the first electrode of the boosting capacitor to a third voltage level substantially higher than said second voltage level and near said voltage supply level in response to said step of discharging the second electrode of the boosting capacitor; withdrawing charge from the node through the current path of the transistor to the first electrode of the boosting capacitor in response to said step of decreasing the voltage; and after said step of withdrawing charge, discharging the first and second electrodes of the second capacitor to a voltage level lower than the operating threshold of the transistor to isolate the boosting capacitor from the node, such that substantially the difference between the second voltage level and the third voltage level is retained across the boosting capacitor until the next active phase of operation.
Claim 31
Independent Claim
428 words
A method for boosting a node to a first voltage level above a voltage supply level in an integrated circuit, comprising the steps of: during an active phase of operation, bringing the potential at a gate of a transistor to the voltage supply level at a first time; bringing the potential of a first electrode of a boosting capacitor to the voltage supply level at a second time; bringing the potential of a second electrode of a second capacitor having a first electrode coupled to the gate to the voltage supply level at a third time after the first time; boosting the potential of the first electrode of the second capacitor and of the gate to a voltage level near the first voltage level in response to said step of bringing the potential of the second electrode thereof to the voltage supply level; fully coupling the first electrode of the boosting capacitor through a current path of the transistor to the node in response to said step of boosting the potential of the gate; raising the potential of a second electrode of the boosting capacitor to the voltage supply level after the second time; boosting the potential of the first electrode of the boosting capacitor to about the first voltage level in response to said step of bringing the potential of the second electrode of the boosting capacitor to the voltage supply level; boosting the node to the first level in response to said steps of fully coupling and of boosting the first electrode of the boosting capacitor; during a reset phase of operation after said step of boosting the node, discharging the second electrode of the boosting capacitor to a second voltage level substantially lower than the voltage supply level; decreasing the voltage on the first electrode of the boosting capacitor to a third voltage level substantially higher than said second voltage level and near said voltage supply level in response to said step of discharging the second electrode of the boosting capacitor; withdrawing charge from the node through the current path of the transistor to the first electrode of the boosting capacitor in response to said step of decreasing the voltage; and after said step of withdrawing charge, discharging the first and second electrodes of the second capacitor to a voltage level lower than the operating threshold of the transistor to isolate the boosting capacitor from the node, such that substantially the difference between the second voltage level and the third voltage level is retained across the boosting capacitor until the next active phase of operation.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.