EP0360256A2
Expired / Lapsed
EP
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Fuzzy computer system
Assignee: Omron Corp
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Filing: 1989-09-20
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Granted: —
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Expires: 2009-09-20
Abstract
Abstract A fuzzy computer system according to the invention comprises: a digital processor; a digital memory; a fuzzy inference processing circuit; and a fuzzy inference processing circuit interface. The digital memory stores programs of the digital processor and inference rules of the fuzzy inference processing circuit. The fuzzy inference processing circuit executes a fuzzy inference on the basis of a given inference rule. The fuzzy inference processing circuit interface connects the digital processor and the fuzzy inference processing circuit. In accordance with the programs stored in the digital memory, the digital processor gives the inference rules stored in the digital memory to the fuzzy inference processing circuit through the interface and fetches the result of the inference of the fuzzy inference processing circuit through the interface.
Inventors
- 👤 Tanichi C/O Omron Tateisi Electronics Co. Ando
- 👤 Kazuaki C/O Omron Tateisi Electronics Co. Urasaki
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 20:32
CPC Classifications
G; G06; G06N; G06N7/00; G06N7/02; G06N7/04; G06N7/043; Y; Y10; Y10S; Y10S706/00; Y10S706/90
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
123 words
A fuzzy computer system comprising: a digital processor; a digital memory; a fuzzy inference processing circuit; and a fuzzy inference processing circuit interface, wherein the digital memory stores programs of the digital processor and inference rules of the fuzzy inference processing circuit, the fuzzy inference processing circuit executes a fuzzy inference on the basis of a given inference rule, the fuzzy inference processing circuit interface connects the digital processor and the fuzzy inference processing circuit, and in accordance with the programs stored in the digital memory, the digital processor gives the inference rules stored in the digital memory to the fuzzy inference processing circuit through the interface and fetches the result of the inference of the fuzzy inference processing circuit through the interface.
Claim 2
Dependent Claim
123 words
A fuzzy computer system comprising: a digital processor; a digital memory; a fuzzy inference processing circuit; and a fuzzy inference processing circuit interface, wherein the digital memory stores programs of the digital processor and inference rules of the fuzzy inference processing circuit, the fuzzy inference processing circuit executes a fuzzy inference on the basis of a given inference rule, the fuzzy inference processing circuit interface connects the digital processor and the fuzzy inference processing circuit, and in accordance with the programs stored in the digital memory, the digital processor gives the inference rules stored in the digital memory to the fuzzy inference processing circuit through the interface and fetches the result of the inference of the fuzzy inference processing circuit through the interface.
Claim 3
Dependent Claim
19 words
A system according to claim 1, further having means for controlling the operation of the system from an outside.
Claim 4
Dependent Claim
33 words
A system according to claim 1, further having means for inputting data to the fuzzy inference processing circuit and means for using the result of the inference of the fuzzy inference processing circuit.
Claim 5
Dependent Claim
130 words
A system according to claim 1, wherein said fuzzy inference processing circuit includes an antecedent processing means, and said antecedent processing means comprises: gate control means for comparing predetermined bits of an input signal which is expressed by a binary signal of a plurality of bits with a code indicative of a set membership function and for outputting a gate control signal when the input signal lies within a range which is covered by said membership function; and adaptation output means for outputting a signal indicative of an adaptation of the input signal to the set membership function by using the bits other than said predetermined bits when the gate control signal is given and for outputting a signal indicative of zero when the gate control signal is not given.
Claim 6
Dependent Claim
43 words
A system according to claim 4, wherein said adaptation output means outputs said other bits as they are or outputs the bits which are obtained by inverting said other bits in accordance with the result of the comparison by said gate control means.
Claim 7
Dependent Claim
20 words
A system according to claim 4, wherein said adaptation output means multiplies said other bits by predetermined times and outputs.
Claim 8
Dependent Claim
112 words
An antecedent processing apparatus comprising: gate control means for comparing predetermined bits of an input signal which is expressed by a binary signal of a plurality of bits with a code indicative of a set membership function and for outputting a gate control signal when the input signal lies within a range which is covered by said membership function; and adaptation output means for outputting a signal indicative of an adaptation of the input signal to the set membership function by using the bits other than said predetermined bits when said gate control signal is given and for outputting a signal indicative of zero when the gate control signal is not given.
Claim 9
Dependent Claim
112 words
An antecedent processing apparatus comprising: gate control means for comparing predetermined bits of an input signal which is expressed by a binary signal of a plurality of bits with a code indicative of a set membership function and for outputting a gate control signal when the input signal lies within a range which is covered by said membership function; and adaptation output means for outputting a signal indicative of an adaptation of the input signal to the set membership function by using the bits other than said predetermined bits when said gate control signal is given and for outputting a signal indicative of zero when the gate control signal is not given.
Claim 10
Dependent Claim
43 words
An apparatus according to claim 7, wherein said adaptation output means outputs said other bits as they are or outputs the bits which are obtained by inverting said other bits in accordance with the result of the comparison by said gate control means.
Claim 11
Dependent Claim
20 words
An apparatus according to claim 7, wherein said adaptation output means multiplies said other bits by predetermined times and outputs.
References Cited (Backward Citations)
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