Electro-optic sampling system clock and stimulus pattern generator

Claim 2

A programmable reference clock generator for an electronic stimulus-pattern generator, said electronic stimulus-pattern generator being triggerable with a clock reference signal to provide an output stimulus-pattern signal for electronically stimulating an electronic device under test in an electro-optical test system, said program­mable clock reference generator comprising: a source of electronic reference pulses; means for synthesizing a synthesized stimulus reference clock signal from said electronic reference pulses; means for programming said synthesizer means to provide a synthesized stimulus reference clock signal which is frequency-locked to one of the harmonic frequencies of the pulse repetition frequency of said electronic reference pulses; and means for coupling said synthesized stimulus reference clock signal from the output of the programmable synthesizer means to a clock input of said electronic stimulus pattern generator to cause a stimulus test pattern to be generated for testing the electronic device under test.

Claim 3

The generator of Claim 1 wherein the means for synthesizing a synthesized stimulus reference clock signal includes means for converting optical pulses to said electronic reference pulses and wherein said optical pulses are coupled to said electro-optical test system to serve as optical sampling pulses, whereby said optical sampling pulses serve as the timing reference for said stimulus test pattern signals.

Claim 4

The generator of Claim 1 wherein the means for synthesizing a synthesized stimulus reference clock signal includes means for generating optical sampling pulses coupled to said electro-optical test system whereby said electronic reference pulses serve as the timing reference for said optical sampling pulses and said synthesized stimulus reference clock signal.

Claim 5

The generator of Claim 1 wherein the means for synthesizing a synthesized stimulus reference clock signal includes means for controlling the occurrence of clock signals from the stimulus reference clock means with respect to the electronic reference pulses to precisely position said stimulus-pattern signal with respect to said electronic reference pulses.

Claim 6

The generator of Claim 1 wherein the means for synthesizing a synthesized stimulus reference clock in­cludes a phase-locked loop having : a phase-detector with a first input terminal coupled to said electronic reference pulses; a loop filter having its input terminal coupled to the output signal of said phase-detector; a controlled-oscillator having its control terminal coupled to the output signal of said loop filter; a programmable frequency divider having its input terminal coupled to the output signal of the controlled oscillator and having its output signal coupled to a second input terminal of said phase detector; whereby the frequency of the output signal of the controlled oscillator is locked to a multiple of the frequency of the electronic reference pulses.

Claim 7

The generator of Claim 5 including a prescale frequency divider having its input terminal coupled to the output signal of the controlled oscillator.

Claim 8

The generator of Claim 5 including means coupled to the output of the controlled oscillator for programmably delaying the output signal of said phase-locked loop.

Claim 9

The generator of Claim 7 wherein said means for delaying includes a frequency divider having pulse swallow­ing and expelling capabilities which provides an output signal delayed or advanced in phase from a nominal output signal.

Claim 10

The generator of Claim 7 wherein said means for delaying includes digitally controlled means for providing fine delay in the output signal.

Claim 11

The generator of Claim 9 including means for calibrating the fine delay by comparing a full-scale fine delay to a predetermined coarse delay.

Claim 12

A high-speed electronic stimulus pattern generator for an electro-optic test system, comprising: means for providing a time reference signal or an optical sampling signal for said electro-optic test system and for providing a time reference signal for said electro­nic stimulus pattern generator; programmable time-base means for generating a clock reference signal having a programmed frequency locked to said time reference signal; and means for generating stimulus patterns in synchronism with said clock reference signal whereby said stimulus patterns are synchronized to said time reference signal.

Claim 13

A high-speed electronic stimulus pattern generator for an electro-optic test system, comprising: means for providing a time reference signal or an optical sampling signal for said electro-optic test system and for providing a time reference signal for said electro­nic stimulus pattern generator; programmable time-base means for generating a clock reference signal having a programmed frequency locked to said time reference signal; and means for generating stimulus patterns in synchronism with said clock reference signal whereby said stimulus patterns are synchronized to said time reference signal.

Claim 14

The pattern generator of Claim 11 wherein said programmable time-base means operates at a frequency which is a sub-multiple of the operating frequency of the means for generating stimulus patterns and wherein said means for generating stimulus patterns includes frequency multiplier means for multiplying the frequency of said programmable time-base means to the operating frequency of said means for generating stimulus patterns.

Claim 15

The pattern generator of Claim 12 wherein the frequency-multiplier means includes a phase-locked loop for multiplying the frequency of the programmable time-base means to the operating frequency of said means for generat­ing stimulus patterns.

Claim 16

The pattern generator of Claim 12 including means for generating stimulus pattern signals in a parallel mode in synchronism with the frequency of said time-base means and including means for converting said stimulus pattern signals to a serial mode in synchronism with the operating frequency of said means for generating stimulus patterns.

Claim 17

The pattern generator of Claim 14 wherein said means for converting said stimulus pattern signals to a serial mode and said frequency multiplier means are located in a pin electronics circuit module positioned adjacent to the pins of an electronic device under test with said electro-optic test system.

Claim 18

The pattern generator of Claim 11 wherein said means for generating stimulus patterns includes: means for storing stimulus patterns; means for reading out elements of stimulus patterns stored in said storage means in response to said clock reference signal.

Claim 19

The pattern generator of Claim 16 including means for providing stimulus patterns at lower rates by repeating the bit elements of said stimulus patterns one or more times.

Claim 20

The pattern generator of Claim 13 wherein said means for generating stimulus pattern signals includes means for varying the phase of the operating frequency of said means for generating stimulus pattern signals.

Claim 21

The pattern generator of Claim 16 including means for addressing said means for storing stimulus patterns.

Claim 22

A high-speed electronic stimulus pattern generator for an electro-optic test system, said electro-optic test system including optical sampling pulses which sample electronic stimulus signals and including response signals of an electronic device under test, said electronic device under test being stimulated with a predetermined electronic stimulus pattern, comprising: means for providing a time reference signal for said optical sampling pulse; programmable means for generating a stimulus reference clock signal having a frequency which is an integer multiple of the pulse rate of said optical sampling pulses; means for generating a predetermined stimulus pattern in synchronism with said clock reference signal, said predetermined stimulus pattern having a length and having bits with a bit frequency which is an integer multiple of the optical sampling pulse rate; and means for repeatedly providing said predetermined stimulus to an electronic device under test so that all of the test bits of said stimulus pattern are sampled by said optical sampling pulses.

Claim 23

A high-speed electronic stimulus pattern generator for an electro-optic test system, said electro-optic test system including optical sampling pulses which sample electronic stimulus signals and including response signals of an electronic device under test, said electronic device under test being stimulated with a predetermined electronic stimulus pattern, comprising: means for providing a time reference signal for said optical sampling pulse; programmable means for generating a stimulus reference clock signal having a frequency which is an integer multiple of the pulse rate of said optical sampling pulses; means for generating a predetermined stimulus pattern in synchronism with said clock reference signal, said predetermined stimulus pattern having a length and having bits with a bit frequency which is an integer multiple of the optical sampling pulse rate; and means for repeatedly providing said predetermined stimulus to an electronic device under test so that all of the test bits of said stimulus pattern are sampled by said optical sampling pulses.

Claim 24

The pattern generator of Claim 20 wherein the predetermined stimulus pattern length and the ratio of the period of the optical sampling rate to the period of stimulus pattern bits each contain minimum common factors.

Claim 25

The pattern generator of Claim 20 wherein said programmable means for generating a stimulus reference clock signal includes a phase-locked loop circuit having a programmable frequency divider with a divisor N wherein N is the nearest odd integer determined by calculating the ratio between a desired stimulus reference clock signal and the optical pulse repetition rate.

Claim 26

The pattern generator of Claim 22: wherein the length of a stimulus pattern is formed from a plurality of subsets having a fixed length; wherein the integer X is the least odd number greater than the ratio of the length of the stimulus pattern to the subset length; wherein the integer X contain no common factors with N; and wherein the final length of a stimulus pattern is increased to a final length having an integer number of subsets.

Claim 27

The pattern generator of Claim 20 for use with the electro-optic test system operating in a sequential sampling mode.