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EP0357188A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Pipelined processor

Assignee: Fujitsu Services Ltd
•
Filing: 1989-06-28
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Granted: —
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Expires: 2009-06-28
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Abstract

Abstract In a pipelined data processor, when a dependency is detected between a first instruction and a second, subsequent instruction, the second instruction is abandoned. A look-ahead mode of operation is then initiated, in which instructions subsequent to the abandoned instruction are allowed to continue to be executed so as to pre-fetch operands, but are not allowed to be fully executed. The processor has two separate streams of instructions, each of which streams can be independently put into look-ahead mode. When one stream is in look-ahead mode, the other is given priority.

Inventors

  • 👤 Colin Martin Duxbury
  • 👤 John Richard Eaton
  • 👤 Philip Vivian Rose

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 09:55
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3861; G06F9/3865; G06F9/3824; G06F9/383; G06F9/3836; G06F9/3851; G06F9/3863; G06F9/3867

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 103 words
Data processing apparatus comprising a plurality of pipeline stages (UP0, UP1-- DS0, DS1-- LP0, LP1---) for executing a sequence of instructions in a pipelined manner, characterised in that: (a) upon detection of a dependency between a first instruction and a second, subsequent instruction, the second instruction is abandoned, and a look-ahead mode of operation is initiated, (b) in the look-ahead mode, instructions subsequent to the abandoned instruction are allowed to continue to be executed so as to prefetch any operands for those instructions, but are not fully executed, and (c) when the look-ahead mode is terminated, execution is re-started at the abandoned instruction.
Claim 2
Dependent Claim 103 words
Data processing apparatus comprising a plurality of pipeline stages (UP0, UP1-- DS0, DS1-- LP0, LP1---) for executing a sequence of instructions in a pipelined manner, characterised in that: (a) upon detection of a dependency between a first instruction and a second, subsequent instruction, the second instruction is abandoned, and a look-ahead mode of operation is initiated, (b) in the look-ahead mode, instructions subsequent to the abandoned instruction are allowed to continue to be executed so as to prefetch any operands for those instructions, but are not fully executed, and (c) when the look-ahead mode is terminated, execution is re-started at the abandoned instruction.
Claim 3
Dependent Claim 19 words
Apparatus according to claim 1 wherein the look-ahead mode is terminated when the dependency is about to be resolved.
Claim 4
Dependent Claim 34 words
Apparatus according to claim 2 wherein the look-ahead mode is terminated when a data slave store access is initiated to retrieve data required for resolving the dependency, but before the data is actually available.
Claim 5
Dependent Claim 92 words
Apparatus according to any preceding claim, including : (a) a first counter (51) for indicating the next instruction to be started in normal mode, (b) a second counter (52) for indicating the next instruction to be started in look-ahead mode, and (c) means (55-59) for incrementing both counters in step with each other while the counters are equal in normal mode, for incrementing only the second counter in look-ahead mode, and operative on return to normal mode for incrementing only the first counter, until it is again equal to the second counter.
Claim 6
Dependent Claim 28 words
Apparatus according to any preceding claim, including means (10) for initiating first and second independent streams of instructions, wherein each stream can be independently put into look-ahead mode.
Claim 7
Dependent Claim 36 words
Apparatus according to claim 5 wherein, when one stream is in the look-ahead mode and the other is in the normal mode, the stream in the normal mode is given execution priority over the other stream.

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