Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
117 words
A method of detecting the clock rate and recovering the carrier in a TDMA signal, comprising the steps of: a) storing for a predetermined amount of time quadrature baseband components (I,Q) as sampled data; b) estimating the clock rate phase error of said baseband samples; c) correcting the clock phase of said baseband samples from the estimated clock phase error using interpolation over said sampled quadrature components; d) estimating the carrier phase error of said stored baseband time corrected quadrature samples; e) correcting the carrier phase of said stored baseband time corrected samples according to said estimated phase error; and f) forwarding said corrected clock and carrier signals to decision circuit means (60) for providing demodulated data.
Claim 2
Independent Claim
117 words
A method of detecting the clock rate and recovering the carrier in a TDMA signal, comprising the steps of: a) storing for a predetermined amount of time quadrature baseband components (I,Q) as sampled data; b) estimating the clock rate phase error of said baseband samples; c) correcting the clock phase of said baseband samples from the estimated clock phase error using interpolation over said sampled quadrature components; d) estimating the carrier phase error of said stored baseband time corrected quadrature samples; e) correcting the carrier phase of said stored baseband time corrected samples according to said estimated phase error; and f) forwarding said corrected clock and carrier signals to decision circuit means (60) for providing demodulated data.
Claim 3
Dependent Claim
68 words
A method as defined in claim 1 wherein said clock phase error is estimated by applying a Costas loop to said baseband components for recovering the correct clock information; filtering the real and imaginary components of each baseband component; squaring said real and imaginary components to remove phase ambiguity; summing the resultant real and imaginary components from each baseband; and averaging to provide said clock phase error estimate.
Claim 4
Dependent Claim
28 words
A method as defined in claim 2 wherein said clock phase estimate is used to interpolate over said stored samples to generate the clock-phase corrected sampled quadrature components.
Claim 5
Independent Claim
46 words
A method as defined in any of the claims 1 to 3, wherein, said carrier phase is estimated by applying a four-power complex multiplication to said time corrected quadrature baseband components; and averaging the resultant signal over a clock burst to provide said carrier phase estimate.
Claim 6
Dependent Claim
30 words
A method as defined in claim 4 wherein said carrier phase is recovered by using said carrier phase estimate to restore the samples to the true I and Q position.
Claim 7
Independent Claim
49 words
A method as defined in any of the claims 1 to 5, further comprising the steps of: g) estimating the magnitude error of said stored baseband time corrected quadrature samples; and h) correcting the carrier magnitude of said stored baseband time corrected samples according to said estimated magnitude error.
Claim 8
Dependent Claim
40 words
A method as defined in claim 6 wherein said magnitude error is estimated by applying a fourth-power complex multiplication to said time corrected quadrature baseband components; and averaging the resultant signal over a clock burst to provide said magnitude estimate.
Claim 9
Dependent Claim
29 words
A method as defined in claim 7 wherein said carrier magnitude is recovered by using said magnitude estimate to restore the samples to the true I and Q position.
Claim 10
Dependent Claim
187 words
A circuit for executing the method of any of the claims 1 to 8, comprising - a delay buffer (54) for storing for a pre-determined amount of time quadrature baseband components /I,Q) as sampled data, - a first estimating circuit (55) for receiving said quadrature baseband components for estimating the clock rate phase error of said baseband samples, - a data interpolation means (56) responsive to the output of said first estimating circuit for correcting the clock phase of said baseband samples using interpolation over said sampled quadrature components, - a second delay buffer (57) for storing the baseband time corrected quadrature samples obtained from said data interpolation means (56), - a second estimating circuit (58) for estimating the carrier phase error of said baseband time corrected quadrature samples, - a correction circuit (59) responsive to the output of said second estimating circuit (58) for correcting the carrier phase of the baseband time corrected samples stored in said second delay buffer (57) according to said estimated phase error, and - decision circuit means (60) for converting the signals received from said correction circuit (59) into demodulated data.
Claim 11
Dependent Claim
53 words
A circuit as defined in claim 9, wherein said second estimating circuit (58) is adapted to further estimate the magnitude error of said baseband time corrected quadrature samples and said correction circuit (59) is adapted to further correct the carrier magnitude of said stored baseband time corrected samples according said estimated magnitude error.