EP0351536A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Systematic recovery of excessive spin loops in an n-way mp environment
Assignee: International Business Machines Corp
•
Filing: 1989-06-08
•
Granted: —
•
Expires: 2009-06-08
Abstract
Abstract A program executing on a first processor in an MP configuration awaiting the release of a resource held by another processor, detects the expiration of a fixed time interval, and initiates a hierarchy of recovery actions designed to cause the resource to be freed. These actions, targeted at a processor believed to be the one currently holding the resource, are taken only if that processor is not executing an "exempt" routine. The actions, taken in order of increasing severity, are: wait for a second fixed time interval; terminate the routine on the resource-holding processor, allowing retry; terminate the routine without allowing retry; invoke Alternate CP Recovery. The hierarchy is escalated against the target processor until that processor releases the resource, and against other processors in the configuration until the resource is acquired by the first processor. These actions may proceed in parallel for multiple detecting and target processors within an MP environment.
Inventors
- 👤 James Clifford Daly
- 👤 Jeffrey Mark Nick
- 👤 Franklin John Rodegeb
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 22:13
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/52; G06F11/00; G06F11/07; G06F11/0703; G06F11/0706; G06F11/0721; G06F11/0724; G06F11/0793; G06F11/0751; G06F11/0754; G06F11/0757; G06F11/14; G06F11/1402; G06F11/1405
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
198 words
In a multiprocessing system complex comprising at least two processors, an operating system, and resources shared among processors, a method for recognition of and recovery from excessive spin loops by the operating system comprising: A) detecting, by a detecting routine in a first processor, that said first processor has been in a spin loop requiring a resource held by a resource-holding routine in another processor for a fixed time period; B) identifying a target processor in said system complex as a target for responsive recovery action; C) performing no responsive recovery actions if a bypass indicator set by a routine in said second processor so indicates; D) automatically performing for said target processor one of a hierarchical sequence of responsive programmed recovery actions if said bypass indicator is off; E) continuing to identify said target and to perform subsequent hierarchical recovery actions for said target processor until said target processor is no longer so identified as said target; F) continuing to so detect the holding of any of said resources for said fixed time period and to identify target processors and perform target processor-specific hierarchical recovery actions until all of said resources are acquired by all detecting processors.
Claim 2
Dependent Claim
198 words
In a multiprocessing system complex comprising at least two processors, an operating system, and resources shared among processors, a method for recognition of and recovery from excessive spin loops by the operating system comprising: A) detecting, by a detecting routine in a first processor, that said first processor has been in a spin loop requiring a resource held by a resource-holding routine in another processor for a fixed time period; B) identifying a target processor in said system complex as a target for responsive recovery action; C) performing no responsive recovery actions if a bypass indicator set by a routine in said second processor so indicates; D) automatically performing for said target processor one of a hierarchical sequence of responsive programmed recovery actions if said bypass indicator is off; E) continuing to identify said target and to perform subsequent hierarchical recovery actions for said target processor until said target processor is no longer so identified as said target; F) continuing to so detect the holding of any of said resources for said fixed time period and to identify target processors and perform target processor-specific hierarchical recovery actions until all of said resources are acquired by all detecting processors.
Claim 3
Dependent Claim
51 words
The method of claim 1 in which a subsequent one of said recovery actions in said hierarchical sequence is performed for said target processor only if an immediately preceding one of said hierarchical recovery actions has been performed for said target processor longer ago than one of said fixed time periods.
Claim 4
Dependent Claim
63 words
The method of claim 2 in which said subsequent action in said hierarchical sequence is performed if there has been said detecting of one of said spin loops requiring one of said resources held by any of said processors in said multiprocessing complex within two of said fixed time periods, and in which an initial one of said hierarchical actions is performed otherwise.
Claim 5
Dependent Claim
40 words
The method of claim 3 in which said hierarchical sequence comprises the action of abnormally terminating said routine in said target processor in a manner that permits a resource-holding routine in said target processor to resume normal execution after cleanup.
Claim 6
Dependent Claim
93 words
The method of claim 3 in which said hierarchical sequence comprises the actions of: A) continuing to wait for said resource to be released for a second fixed time period; B) abnormally terminating a resource-holding routine in said target processor in a manner that permits said routine in said target processor to resume normal execution after cleanup; C) terminating said resource-holding routine in said target processor in a manner that does not permit said routine in said target processor to resume normal execution; D) removing said target processor from said multiprocessor system complex.
Claim 7
Dependent Claim
97 words
The method of claim 3 in which said hierarchical sequence comprises the following actions, in the order listed: A) continuing to wait for said resource to be released for a second fixed time period; B) abnormally terminating said resource-holding routine in said target processor in a manner that permits said routine in said target processor to resume normal execution after cleanup; C) terminating said resource-holding routine in said target processor in a manner that does not permit said routine in said target processor to resume normal execution; D) removing said target processor from said multiprocessor system complex.
Claim 8
Dependent Claim
160 words
In a multiprocessing system complex comprising at least two processors, an operating system, and resources shared among processors, a mechanism for recognition of and recovery from excessive spin loops by the operating system comprising: A) detection means for detecting that a first processor has been in a spin loop requiring a resource held by a routine in a second processor for a fixed time period; B) identification means for identifying a target processor in said system complex as a target for responsive recovery action when said detecting means detects said spin loop; C) a processor-bypass indicator associated with each of said processors and having an "on" setting and an "off" setting, said bypass indicator being set to said "on" setting when an exempt routine is executing in said processor associated with said "on" bypass indicator; D) responsive recovery means for freeing said resource held by said target processor only if said processor-bypass indicator associated with said target processor is "off".
Claim 9
Dependent Claim
160 words
In a multiprocessing system complex comprising at least two processors, an operating system, and resources shared among processors, a mechanism for recognition of and recovery from excessive spin loops by the operating system comprising: A) detection means for detecting that a first processor has been in a spin loop requiring a resource held by a routine in a second processor for a fixed time period; B) identification means for identifying a target processor in said system complex as a target for responsive recovery action when said detecting means detects said spin loop; C) a processor-bypass indicator associated with each of said processors and having an "on" setting and an "off" setting, said bypass indicator being set to said "on" setting when an exempt routine is executing in said processor associated with said "on" bypass indicator; D) responsive recovery means for freeing said resource held by said target processor only if said processor-bypass indicator associated with said target processor is "off".
Claim 10
Dependent Claim
39 words
The mechanism of claim 7 in which said responsive recovery means comprises a hierarchical set of recovery functions, which further comprise an ABEND-triggering function for causing a resource-holding routine executing in said target processor to abnormally terminate, allowing retry.
Claim 11
Dependent Claim
93 words
The mechanism of claim 7 in which said responsive recovery means comprises a hierarchical set of recovery functions, said functions comprising: A) a spin function for permitting said first processor to remain in said spin loop for a second fixed time period; B) an ABEND-triggering function for causing a resource-holding routine executing in said target processor to abnormally terminate, allowing retry; C) a TERMINATE-triggering function for causing a resource-holding routine executing in said target processor to terminate without retry; D) an ACR function for removing said target processor from said multiprocessor system complex.
Claim 12
Dependent Claim
77 words
The mechanism of claim 9 further comprising means for causing successive detections of said spin loop fixed time periods resulting in identification of the same target processor or a different target processor to cause invocation of one of said recovery functions, said recovery functions being invoked in the order A, B, C, D for a particular target processor, if one of said functions was invoked less recently than said fixed time period for said identified target processor.
Claim 13
Dependent Claim
49 words
The mechanism of claim 10 further comprising means for causing a successive detection of said spin loop fixed time period following a prior detection to invoke a sequential recovery function for said identified target processor when said successive detection occurs within 2 fixed time intervals of said prior detection.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.