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EP0349021A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor device and method of manufacturing the same

Assignee: Toshiba Corp
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Filing: 1986-01-29
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Granted: —
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Expires: 2006-01-29
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Abstract

Abstract A semiconductor device comprises a first semiconductor region (114) of a first conductivity type, a second semiconductor region (81) of a second conductivity type, and an interconnection layer (93) containing an impurity of a second conductivity type. Said interconnection layer (93) connects said first semiconductor region (114) with said second semiconductor region (81). A third semiconductor region (117) of said second conductivity type is provided which is formed in said first semiconductor region (114) upon diffusion of the impurity from said inter­connection layer (93) to said first semiconductor region (114) and is adapted to form, together with said first semiconductor region (114), an Esaki diode as said p-n junction diode.

Inventors

  • 👤 Kiyoshi Patent Division Kobayashi
  • 👤 Kiyofumi Patent Division Ochii
  • 👤 Tatsuya Patent Division Inatsuki

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 02:40
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406; H10B; H10B10/00; H10D88/00; H10P; H10P32/00; H10P32/10; H10P32/14; H10W; H10W20/00; H10W20/01; H10W20/40; H10W20/41; H10W20/44; H10W20/4451

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 142 words
A semiconductor device comprising a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and an interconnection layer containing an impurity of a second conductivity type, wherein said first semiconductor region forms a part of a p-n junction diode, characterized in that - said interconnection layer (93) connects said first semiconductor region (114) with said second semiconductor region (81); a third semiconductor region (117) of said second conductivity type is provided which is formed in said first semiconductor region (114) upon diffusion of the impurity from said interconnection layer (93) to said first semiconductor region (114) having the same crystalline semiconductor material as said third semiconductor region (117), and - said third semiconductor region (117) is adapted to form, together with said first semiconductor region (114) an Esaki diode as said p-n junction diode.
Claim 2
Dependent Claim 142 words
A semiconductor device comprising a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and an interconnection layer containing an impurity of a second conductivity type, wherein said first semiconductor region forms a part of a p-n junction diode, characterized in that - said interconnection layer (93) connects said first semiconductor region (114) with said second semiconductor region (81); a third semiconductor region (117) of said second conductivity type is provided which is formed in said first semiconductor region (114) upon diffusion of the impurity from said interconnection layer (93) to said first semiconductor region (114) having the same crystalline semiconductor material as said third semiconductor region (117), and - said third semiconductor region (117) is adapted to form, together with said first semiconductor region (114) an Esaki diode as said p-n junction diode.
Claim 3
Dependent Claim 27 words
A device according to claim 2, characterized in that gate electrodes of said first and second MOS transistors belong to a layer different from said interconnection layer.
Claim 4
Independent Claim 236 words
A method for manufacturing a semiconductor device comprising the steps of: - forming a first semiconductor region (114) of a first conductivity type (P) in a surface region of a first semiconductor layer (112) of a second conductivity type (N-) formed in a substrate (110); - forming a second semiconductor region (81) of the second conductivity type in a surface region of a second semiconductor layer (111) of the first conductivity type formed in the substrate (110); - forming an insulating film (115) to cover an entire surface of the substrate which includes the first and second semiconductor regions (114, 81); - selectively etching the insulating film (115) and forming openings respectively communicating with the first and second semiconductor regions (114, 81); - forming a conductive material layer (93) containing an impurity of the second conductivity type (N) to cover the entire surface of the substrate (110), - doping the impurity of the second conductivity type in the conductive material layer through the opening to form a third semiconductor region (117) of the second conductivity type and of the same crystalline semiconductor material as the first semiconductor region (114), thereby forming an Esaki diode as a p-n junction diode consisting of said first semiconductor region (114) and of said third semiconductor region (117); and - patterning the conductive material layer (93) to form an interconnection layer for connecting the first and second semiconductor regions (114, 81).
Claim 5
Independent Claim 236 words
A method for manufacturing a semiconductor device comprising the steps of: - forming a first semiconductor region (114) of a first conductivity type (P) in a surface region of a first semiconductor layer (112) of a second conductivity type (N-) formed in a substrate (110); - forming a second semiconductor region (81) of the second conductivity type in a surface region of a second semiconductor layer (111) of the first conductivity type formed in the substrate (110); - forming an insulating film (115) to cover an entire surface of the substrate which includes the first and second semiconductor regions (114, 81); - selectively etching the insulating film (115) and forming openings respectively communicating with the first and second semiconductor regions (114, 81); - forming a conductive material layer (93) containing an impurity of the second conductivity type (N) to cover the entire surface of the substrate (110), - doping the impurity of the second conductivity type in the conductive material layer through the opening to form a third semiconductor region (117) of the second conductivity type and of the same crystalline semiconductor material as the first semiconductor region (114), thereby forming an Esaki diode as a p-n junction diode consisting of said first semiconductor region (114) and of said third semiconductor region (117); and - patterning the conductive material layer (93) to form an interconnection layer for connecting the first and second semiconductor regions (114, 81).

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