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EP0348968A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Multilevel quadrature amplitude modulator capable of reducing a maximum amplitude of a multilevel quadrature amplitude modulated signal regardless of transmission data information or redundant information

Assignee: NEC Corp
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Filing: 1989-06-29
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Granted: —
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Expires: 2009-06-29
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Abstract

Abstract In order to produce first and second Lee-error correcting code sequences in a multilevel quadrature amplitude modulator comprising a code converting unit (10) for converting first and second 2 m -level input digital signals into first and second major converted signals by rearranging a square signal point arrangement into an approximately circular arrangement on a phase plane, each of the first and the second major converted signals consisting of m binary bits numbered from a first (least significant) bit through an m-th (most significant) bit, a first error correcting code producing circuit (21) carries out error correcting calculation for the first through an n-th bits of the first major converted signal to produce the first Lee-error correcting code sequence where n represents an integer (2 ≦ n ≦ m). Similarly, a second error correcting code producing circuit (22) produces the second Lee-error correcting code sequence. The first and the second major converted signals are multiplexed with the first and the second error correcting code sequences into a first and a second major multiplexed signal, respec­tively, which are then modulated into a multilevel quadrature amplitude modulated signal. In a counterpart multilevel quadrature amplitude demodulator, an inverse operation is carried out to produce the first and the second input digital signals.

Inventors

  • 👤 Katsuhiro C/O Nec Corporation Nakamura
  • 👤 Seiichi C/O Nec Corporation Noda

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-28 17:30
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/345; H04L27/3455

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 496 words
A multilevel quadrature amplitude modulator for modulating a first and a second input digital signal into a multilevel quadrature amplitude modulated signal, each of said first and said second input digital signals being capable of representing at most N levels where N is equal to 2 m where, in turn, m represents an integer which is not less than three, said multilevel quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane, said modulator rearranging said signal points on said phase plane from a square arrangement into an approximately circular arrangement in which said signal points are arranged on an approximately circular region having a specific region inwardly of a circle, wherein the improvement comprises: code converting means for converting said first input digital signal to a first major and a first minor converted signal and said second input digital signal to a second major and a second minor converted signal, each of said first and said second major converted signals having m bits numbered from a first bit to an m-th bit in bit parallel and having a first rearranged group of a first predetermined number of levels and a second rearranged group of a second predetermined number of levels, said first bit being a least significant bit of each of said first and said second major converted signals, each of said first and said second predetermined number of levels being related to one of said signal points at a time, said first minor converted signal having a third predetermined number of levels related to said first and said second rearranged groups, said second minor converted signal having a fourth predetermined number of levels related to said first and said second rearranged groups; first error correcting code produced means for producing a first Lee-error correcting code sequence in response to a first error correcting input signal consisting of the first through the n-th bits of said first major converted signal where n represents an integer which is not less than two and is not greater than m; second error correcting code producing means for producing a second Lee-error correcting code sequence in response to a second error correcting input signal consisting of the first through the n-th bits of said second major converted signal; first multiplexing means for multiplexing said first Lee-error correcting code sequence and said first major converted signal into a first major multiplexed signal and said first Lee-error correcting code sequence and said first minor converted signal into a first minor multiplexed signal; second multiplexing means for multiplexing said second Lee-error correcting code sequence and said second major converted signal into a second major multiplexed signal and said second Lee-error correcting code sequence and said second minor converted signal into a second minor multiplexed signal; and modulating means for modulating said first major and said first minor multiplexed signals and said second major and said second minor multiplexed signals into said multilevel quadrature amplitude modulated signal.
Claim 2
Dependent Claim 496 words
A multilevel quadrature amplitude modulator for modulating a first and a second input digital signal into a multilevel quadrature amplitude modulated signal, each of said first and said second input digital signals being capable of representing at most N levels where N is equal to 2 m where, in turn, m represents an integer which is not less than three, said multilevel quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane, said modulator rearranging said signal points on said phase plane from a square arrangement into an approximately circular arrangement in which said signal points are arranged on an approximately circular region having a specific region inwardly of a circle, wherein the improvement comprises: code converting means for converting said first input digital signal to a first major and a first minor converted signal and said second input digital signal to a second major and a second minor converted signal, each of said first and said second major converted signals having m bits numbered from a first bit to an m-th bit in bit parallel and having a first rearranged group of a first predetermined number of levels and a second rearranged group of a second predetermined number of levels, said first bit being a least significant bit of each of said first and said second major converted signals, each of said first and said second predetermined number of levels being related to one of said signal points at a time, said first minor converted signal having a third predetermined number of levels related to said first and said second rearranged groups, said second minor converted signal having a fourth predetermined number of levels related to said first and said second rearranged groups; first error correcting code produced means for producing a first Lee-error correcting code sequence in response to a first error correcting input signal consisting of the first through the n-th bits of said first major converted signal where n represents an integer which is not less than two and is not greater than m; second error correcting code producing means for producing a second Lee-error correcting code sequence in response to a second error correcting input signal consisting of the first through the n-th bits of said second major converted signal; first multiplexing means for multiplexing said first Lee-error correcting code sequence and said first major converted signal into a first major multiplexed signal and said first Lee-error correcting code sequence and said first minor converted signal into a first minor multiplexed signal; second multiplexing means for multiplexing said second Lee-error correcting code sequence and said second major converted signal into a second major multiplexed signal and said second Lee-error correcting code sequence and said second minor converted signal into a second minor multiplexed signal; and modulating means for modulating said first major and said first minor multiplexed signals and said second major and said second minor multiplexed signals into said multilevel quadrature amplitude modulated signal.
Claim 3
Dependent Claim 83 words
A multilevel quadrature amplitude modulator as claimed in Claim 1, wherein said modulator further comprises first supplying means for supplying a first subdata signal to said first multiplexing means, said first multiplexing means multiplexing said first Lee-error correcting code sequence, said first major converted signal, and said first subdata signal into a third major multiplexed signal for use as said first major multiplexed signal and said first Lee-error correcting code sequence and said first minor converted signal into said first minor multiplexed signal.
Claim 4
Dependent Claim 85 words
A multilevel quadrature amplitude modulator as claimed in Claim 1 or 2, wherein said modulator further comprises second supplying means for supplying a second subdata signal to said second multiplexing means, said second multiplexing means multiplexing said second Lee-error correcting code sequence, said second major converted signal, and said second subdata signal into a fourth major multiplexed signal for use as said second major multiplexed signal and said second Lee-error correcting code sequence and said second minor converted signal into said second minor multiplexed signal.
Claim 5
Dependent Claim 190 words
A multilevel quadrature amplitude modulator as claimed in any one of Claims 1 to 3, wherein said modulator further comprises third supplying means for supplying a subdata signal to said first and said second multiplexing means, said subdata signal being a time sequence of binary bits, said third supplying means alternately supplying the binary bits of said subdata signal to said first multiplexing means as a first subdata signal and to said second multiplexing means as a second subdata signal, said first multiplexing means multiplying said first Lee-error correcting code sequence, said first major converted signal, and said first subdata signal into a third major multiplexed signal for use as said first major multiplexed signal and multiplexing said first Lee-error correcting code sequence and said first minor converted signal into said first minor multiplexed signal; said second multiplexing means multiplexing said second Lee-error correcting code sequence, said second major converted signal, and said second subdata signal into a fourth major multiplexed signal for use as said second major multiplexed signal and multiplexing said second Lee-error correcting code sequence and said second minor converted signal into said second minor multiplexed signal.
Claim 6
Dependent Claim 572 words
A multilevel quadrature amplitude demodulator for use as a counterpart of a modulator for converting a first input digital signal and a first Lee-error correcting code sequence into a first modulating signal and converting a second input digital signal and a second Lee-error correcting code sequence into a second modulating signal and for modulating said first and said second modulating signals into a multilevel quadrature amplitude modulated signal specified by a plurality of signal points on a phase plane, each of said first and said second input digital signals being capable of representing at most N levels where N is equal to 2 m where, in turn, m represents an integer which is not less than three, said modulator rearranging said signal points on said phase plane from a square arrangement into an approximately circular arrangement in which said signal points are arranged on an approximately circular region having a specific region inwardly of a circle, said demodulator being for demodulating said multilevel quadrature amplitude modulated signal into a first and a second output digital signal, wherein the improvement comprises: demodulating means for amplitude demodulating said multilevel quadrature amplitude modulated signal into a first major and a first minor demodulated signal and a second major and a second minor demodulated signal, each of said first and said second major demodulated signals having m bits numbered from a first bit to an m-th bit in bit parallel and having a first rearranged group of a first predetermined number of levels and a second rearranged group of a second predetermined number of levels, said first bit being a least significant bit of each of said first and said second major demodulated signals, each of said first and said second predetermined number of levels being related to one of said signal points at a time, said first minor demodulated signal having a third predetermined number of levels related to said first and said second rearranged groups, said second minor demodulated signal having a fourth predetermined number of levels related to said first and said second rearranged groups; first error correcting calculation means for producing a first error correcting signal in response to a first error correcting input signal consisting of the first through an n-th bits of said first major demodulated signal where n represents an integer which is not less than two and is not greater than m; second error correcting calculation means for producing a second error correcting signal in response to a second error correcting input signal consisting of the first through the n-th bits of said second major demodulated signal; first error correcting means for correcting said first major and said first minor demodulated signals with reference to said first error correcting signal to produce a first major correcting result signal as a reproduction of said first modulating signal and a first minor correcting result signal, respectively; second error correcting means for correcting said second major and said second minor demodulated signals with reference to said second error correcting signal to produce a second major correcting result signal as a reproduction of said second modulating signal and a second minor correcting result signal, respectively; and code converting means for converting said first major and said first minor correcting result signals and said second major and said second minor correcting result signals into said first and said second output digital signals as reproductions of said first and said second input digital signals.
Claim 7
Dependent Claim 572 words
A multilevel quadrature amplitude demodulator for use as a counterpart of a modulator for converting a first input digital signal and a first Lee-error correcting code sequence into a first modulating signal and converting a second input digital signal and a second Lee-error correcting code sequence into a second modulating signal and for modulating said first and said second modulating signals into a multilevel quadrature amplitude modulated signal specified by a plurality of signal points on a phase plane, each of said first and said second input digital signals being capable of representing at most N levels where N is equal to 2 m where, in turn, m represents an integer which is not less than three, said modulator rearranging said signal points on said phase plane from a square arrangement into an approximately circular arrangement in which said signal points are arranged on an approximately circular region having a specific region inwardly of a circle, said demodulator being for demodulating said multilevel quadrature amplitude modulated signal into a first and a second output digital signal, wherein the improvement comprises: demodulating means for amplitude demodulating said multilevel quadrature amplitude modulated signal into a first major and a first minor demodulated signal and a second major and a second minor demodulated signal, each of said first and said second major demodulated signals having m bits numbered from a first bit to an m-th bit in bit parallel and having a first rearranged group of a first predetermined number of levels and a second rearranged group of a second predetermined number of levels, said first bit being a least significant bit of each of said first and said second major demodulated signals, each of said first and said second predetermined number of levels being related to one of said signal points at a time, said first minor demodulated signal having a third predetermined number of levels related to said first and said second rearranged groups, said second minor demodulated signal having a fourth predetermined number of levels related to said first and said second rearranged groups; first error correcting calculation means for producing a first error correcting signal in response to a first error correcting input signal consisting of the first through an n-th bits of said first major demodulated signal where n represents an integer which is not less than two and is not greater than m; second error correcting calculation means for producing a second error correcting signal in response to a second error correcting input signal consisting of the first through the n-th bits of said second major demodulated signal; first error correcting means for correcting said first major and said first minor demodulated signals with reference to said first error correcting signal to produce a first major correcting result signal as a reproduction of said first modulating signal and a first minor correcting result signal, respectively; second error correcting means for correcting said second major and said second minor demodulated signals with reference to said second error correcting signal to produce a second major correcting result signal as a reproduction of said second modulating signal and a second minor correcting result signal, respectively; and code converting means for converting said first major and said first minor correcting result signals and said second major and said second minor correcting result signals into said first and said second output digital signals as reproductions of said first and said second input digital signals.
Claim 8
Dependent Claim 49 words
A multilevel quadrature amplitude demodulator as claimed in Claim 5, said first modulating signal further comprising a first subdata signal, wherein said demodulator further comprises first separating means responsive to said first major correcting result signal for separating said first subdata signal from said first major correcting result signal.
Claim 9
Dependent Claim 51 words
A multilevel quadrature amplitude demodulator as claimed in Claim 5 or 6, said second modulating signal further comprising a second subdata signal, wherein said demodulator further comprises second separating means responsive to said second major correcting result signal for separating said second subdata signal from said second major correcting result signal.
Claim 10
Dependent Claim 86 words
A multilevel quadrature amplitude demodulator as claimed in any one of Claims 5 to 7, said first and said second modulating signals further comprising a first and a second subdata signal, respectively, wherein said demodulator further comprises first separating means responsive to said first major correcting result signal for separating said first subdata signal from said first major correcting result signal and second separating means responsive to said second major correcting result signal for separating said second subdata signal from said second major correcting result signal.

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