Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
91 words
A memory cell normally operable as a static random access memory for storing bit data and provided with self back-up during interruption of power, comprising first and second inverters (2, 7) coupled together to define a flip-flop for storing bit data, and writing and reading means (3, 4) coupled to the flip-flop so as to effect writing and reading of bit data to and from the flip-flop, characterised in that the first inverter comprises a memory element (7) which is switchable between a normal transistor function and a non-volatile memory function.
Claim 2
Dependent Claim
91 words
A memory cell normally operable as a static random access memory for storing bit data and provided with self back-up during interruption of power, comprising first and second inverters (2, 7) coupled together to define a flip-flop for storing bit data, and writing and reading means (3, 4) coupled to the flip-flop so as to effect writing and reading of bit data to and from the flip-flop, characterised in that the first inverter comprises a memory element (7) which is switchable between a normal transistor function and a non-volatile memory function.
Claim 3
Dependent Claim
85 words
A memory cell according to claim 1, characterised in that the memory element is arranged during normal operation to provide the normal transistor function whereby to enable the flip-flop to serve as a static random access memory, is arranged immediately before interruption of power to receive the stored bit data to reserve the same in non-volatile state, and is arranged when power is recovered to transfer the reserved bit data for restoring the bit data in the flip-flop serving as the static random access memory.
Claim 4
Dependent Claim
56 words
A memory cell according to claim 1 or 2, characterised in that the memory element comprises a MOS memory element having a floating gate (72) effective to reserve the stored bit data, and a control gate (73) effective to control the potential level of the floating gate for selectively determining the state of the memory element.
Claim 5
Dependent Claim
30 words
A memory cell according to claim 3, characterised in that the control gate is arranged to receive three different bias voltages for selectively determining the state of the memory element.
Claim 6
Dependent Claim
23 words
A memory cell according to any preceding claim characterised in that the memory element is operable by a power supply below 5 volts.
Claim 7
Dependent Claim
18 words
A memory cell according to any preceding claim characterised by control means operable to control the memory element.
Claim 8
Dependent Claim
26 words
A memory cell according to any preceding claim characterised in that the first inverter further comprises a load (5) connected in series with the memory element.
Claim 9
Dependent Claim
25 words
A memory cell according to any preceding claim characterised in that the second inverter comprises a transistor (2) and a load (6) connected in series.
Claim 10
Dependent Claim
31 words
A memory cell according to any preceding claim characterised in that the writing and reading means comprise first and second transistors (3, 4) connected respectively to the first and second inverters.