Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
63 words
A field effect transistor characterised in that it comprises a p-type diamond substrate (10) including spaced apart source and drain regions (S,D) of p⁺ material with respective ohmic or quasi-ohmic source and drain contacts (14) applied thereto at the surface of the substrate, and a gate electrode (18,20) on or adjacent to the surface of the substrate between the source and drain regions.
Claim 2
Dependent Claim
63 words
A field effect transistor characterised in that it comprises a p-type diamond substrate (10) including spaced apart source and drain regions (S,D) of p⁺ material with respective ohmic or quasi-ohmic source and drain contacts (14) applied thereto at the surface of the substrate, and a gate electrode (18,20) on or adjacent to the surface of the substrate between the source and drain regions.
Claim 3
Dependent Claim
37 words
A field effect transistor according to claim 1 characterised in that the gate electrode (18) is separated from the surface of the substrate by an insulating layer (16) of a wide-bandgap material, to provide a MISFET configuration.
Claim 4
Dependent Claim
29 words
A field effect transistor according to claim 1 characterised in that the gate electrode (20) is applied directly to the surface of the substrate to provide a MESFET configuration.
Claim 5
Dependent Claim
69 words
A field effect transistor according to any one of claims 1 to 3 characterised in that the source and drain contacts (14) applied to the source and drain regions (S,D) are quasi-ohmic contacts formed by the deposition of p⁺ doped amorphous silicon or germanium (12) on the substrate (10) above the source and drain regions, with a metal layer (14) being deposited on the p⁺ doped silicon or germanium.
Claim 6
Dependent Claim
31 words
A field effect transistor according to claim 4 characterised in that the metal layer (14) comprises aluminium, molybdenum, molybdenum/tantalum alloy, chrome, titanium, nichrome, titanium/tungsten alloy, palladium, platinum, or an aluminium/silicon alloy.
Claim 7
Dependent Claim
136 words
A process for manufacturing a field-effect transistor characterised in that it includes the steps of: providing a p-type diamond substrate (10); depositing a layer (12) of p⁺ doped amorphous silicon or germanium on the surface of the substrate; depositing a layer (14) of a first metal over the p⁺ layer; selectively removing portions of the layer (14) of the first metal and the p⁺ layer (12) to define spaced apart source and drain regions (S,D) of the transistor, with a gate region (G) being defined by an exposed portion of the substrate between the source and drain regions; depositing a layer (16) of a wide-bandgap insulating material over the source, gate and drain regions; selectively removing portions of the layer (16) of insulating material; and providing metallic contacts (14,18) for the source, gate and drain regions.
Claim 8
Dependent Claim
136 words
A process for manufacturing a field-effect transistor characterised in that it includes the steps of: providing a p-type diamond substrate (10); depositing a layer (12) of p⁺ doped amorphous silicon or germanium on the surface of the substrate; depositing a layer (14) of a first metal over the p⁺ layer; selectively removing portions of the layer (14) of the first metal and the p⁺ layer (12) to define spaced apart source and drain regions (S,D) of the transistor, with a gate region (G) being defined by an exposed portion of the substrate between the source and drain regions; depositing a layer (16) of a wide-bandgap insulating material over the source, gate and drain regions; selectively removing portions of the layer (16) of insulating material; and providing metallic contacts (14,18) for the source, gate and drain regions.
Claim 9
Dependent Claim
69 words
A process according to claim 6 characterised in that a layer of a second metal (18), different from the first metal (14), is deposited over the layer of the insulating material (16) and then selectively removed from the source and drain regions (S,D), so that a MISFET structure is obtained having source and drain contacts (14) of the first metal and a gate contact (18) of the second metal.
Claim 10
Dependent Claim
96 words
A process according to claim 6 characterised in that a portion of the layer (16) of insulating material is removed above the gate region (G) to expose the substrate (10), a layer (18) of a second metal having a low work function is deposited over the source, gate and drain regions (S,G,D), and the layer (18) of the second metal is then selectively removed from the source and drain regions, so that a MESFET structure is obtained having source and drain contacts (14) of the first metal and a gate contact (18) of the second metal.
Claim 11
Dependent Claim
17 words
A process according to claim 8 characterised in that the second metal is aluminium, gold or titanium.
Claim 12
Dependent Claim
47 words
A process according to any one of claims 7 to 9 characterised in that the layer (12) of p⁺ doped amorphous silicon or germanium and the layers (14, 18) of the first and second metals are deposited by chemical vapour deposition (CVD) or physical vapour deposition (PVD).
Claim 13
Dependent Claim
32 words
A process according to any one of claims 6 to 10 characterised in that the selective removal of portions of the various layers is done by a photolithographic masking and etching process.
Claim 14
Dependent Claim
35 words
A process according to any one of claims 6 to 11 characterised in that the wide-bandgap insulating material (16) comprises an oxide, nitride, oxynitride or carbide, and is deposited by a CVD or PVD process.