EP0342778A1
Expired / Lapsed
EP
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Ion implanted semiconductor device
Assignee: Nortel Networks Ltd
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Filing: 1989-03-10
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Granted: —
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Expires: 2009-03-10
Abstract
Abstract A conductor-dielectric-semiconductor device and a method of making such a device which has an insulating silicon-dioxide dielectric layer on a silicon substrate, and a conductive layer over a region of the dielectric layer. Silicon ions have been implanted into the region under the conductive layer. Depending upon the thickness of the region and the concentration of implanted silicon ions, the device can function as an IGFET memory device or a vertical resistor between the conductive layer and the substrate.
Inventors
- 👤 Alexander Kalnitsky
- 👤 Michael Ian Heathcote King
- 👤 Robert Allan Hadaway
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 14:20
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10B; H10B10/00; H10B10/15; H10B41/00; H10D1/00; H10D1/40; H10D1/47; H10D30/00; H10D30/60; H10D30/69; H10D62/00; H10D62/80; H10D62/83; H10D64/60; H10D64/62; H10D64/66; H10D64/68; H10D64/681
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
97 words
A method of making a conductor-dielectric-semiconductor device comprising the steps of: providing a silicon substrate having a channel region; forming an insulating silicon-dioxide layer on a surface of the silicon substrate having a dielectric region overlying the channel region; forming a conductive layer over at least a portion of the dielectric region, and characterized by prior to forming the conductive layer 36, implanting silicon ions 39 in the dielectric region 34, under the region of the conductive layer, with the maximum density of the ions being towards but not contiguous the surface of the silicon substrate 30.
Claim 2
Independent Claim
97 words
A method of making a conductor-dielectric-semiconductor device comprising the steps of: providing a silicon substrate having a channel region; forming an insulating silicon-dioxide layer on a surface of the silicon substrate having a dielectric region overlying the channel region; forming a conductive layer over at least a portion of the dielectric region, and characterized by prior to forming the conductive layer 36, implanting silicon ions 39 in the dielectric region 34, under the region of the conductive layer, with the maximum density of the ions being towards but not contiguous the surface of the silicon substrate 30.
Claim 3
Independent Claim
136 words
A method of making an IGFET memory device comprising the steps of: providing a silicon substrate having a channel region; forming an insulating silicon-dioxide layer on a surface of the silicon substrate having a gate oxide region overlying the channel region; forming a conductive gate layer over a portion of the gate oxide region; and forming source and drain regions in the channel region by conventional means, using the conductive gate as a mask, and characterized by prior to forming the conductive gate layer 36: implanting silicon ions 39 in the gate oxide region 34, under the region of the conductive gate of between about 0.01 and 2.0x10¹⁶ ions/cm² to form silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 30.
Claim 4
Independent Claim
136 words
A method of making an IGFET memory device comprising the steps of: providing a silicon substrate having a channel region; forming an insulating silicon-dioxide layer on a surface of the silicon substrate having a gate oxide region overlying the channel region; forming a conductive gate layer over a portion of the gate oxide region; and forming source and drain regions in the channel region by conventional means, using the conductive gate as a mask, and characterized by prior to forming the conductive gate layer 36: implanting silicon ions 39 in the gate oxide region 34, under the region of the conductive gate of between about 0.01 and 2.0x10¹⁶ ions/cm² to form silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 30.
Claim 5
Dependent Claim
56 words
A method as defined in claim 2 in which the gate oxide region is formed to a thickness of between about 10 and 50 nm and the maximum density of the implanted ions in the silicon dioxide is at a distance of at least about 3 to 7 nm from said surface of the silicon substrate.
Claim 6
Dependent Claim
25 words
A method as defined in claim 2 in which implanting the silicon ions 39 is carried out using about 6 to 40 keV of energy.
Claim 7
Dependent Claim
38 words
A method as defined in claim 2 in which the thickness of the gate oxide region 34 is about 25nm and the implant doseage of silicon ions is about 2x10¹⁵ ions/cm² at an energy level of 25 keV.
Claim 8
Dependent Claim
42 words
A method as defined in claim 3 in which the distance from the maximum density of the ions 39 to the conductive layer 36 is greater than that from the maximum density of the ions to the surface of the silicon substrate.
Claim 9
Dependent Claim
84 words
A conductor-dielectric-semiconductor device comprising: a silicon substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having a dielectric gate region overlying the channel region; a conductive gate layer over a portion of the dielectric gate region, and characterized by implanted silicon ions 39 in the dielectric gate region 34, under the region of the conductive gate layer 36, with the maximum density of the ions being towards but not contiguous the surface of the silicon substrate 30.
Claim 10
Dependent Claim
84 words
A conductor-dielectric-semiconductor device comprising: a silicon substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having a dielectric gate region overlying the channel region; a conductive gate layer over a portion of the dielectric gate region, and characterized by implanted silicon ions 39 in the dielectric gate region 34, under the region of the conductive gate layer 36, with the maximum density of the ions being towards but not contiguous the surface of the silicon substrate 30.
Claim 11
Dependent Claim
106 words
An IGFET memory device comprising: a semiconductor substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having a gate oxide region overlying the channel region; a conductive gate layer over a portion of the gate oxide region; source and drain regions in the channel region; and characterized by implanted silicon ions 39 in the gate oxide region 34, under the region of the conductive gate 36 of between about 0.1 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 30.
Claim 12
Dependent Claim
106 words
An IGFET memory device comprising: a semiconductor substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having a gate oxide region overlying the channel region; a conductive gate layer over a portion of the gate oxide region; source and drain regions in the channel region; and characterized by implanted silicon ions 39 in the gate oxide region 34, under the region of the conductive gate 36 of between about 0.1 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 30.
Claim 13
Dependent Claim
56 words
A device as defined in claim 8 in which the gate oxide region 34 has a thickness of between about 10 and 50 nm and the maximum density of the implanted ions 39 in the silicon dioxide is at a distance of at least about 3 to 7 nm from said surface of the silicon substrate.
Claim 14
Dependent Claim
43 words
A device as defined in claim 9 in which the distance from the maximum density of the ions 39 to the conductive layer 36 is greater than that from the maximum density of the ions to the surface of the silicon substrate 30.
Claim 15
Dependent Claim
120 words
An IGFET device comprising: a semiconductor substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having an oxide region overlying the channel region; a first conductive gate layer over a portion of the oxide region; source and drain regions in the channel region contiguous the first conductive gate layer; a second conductive layer over another portion of the oxide region and the drain region; and characterized by implanted silicon ions 69 in the oxide region 63, over the drain region 71 of between about 5.0 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 60.
Claim 16
Dependent Claim
120 words
An IGFET device comprising: a semiconductor substrate having a channel region; an insulating silicon-dioxide layer on a surface of the silicon substrate having an oxide region overlying the channel region; a first conductive gate layer over a portion of the oxide region; source and drain regions in the channel region contiguous the first conductive gate layer; a second conductive layer over another portion of the oxide region and the drain region; and characterized by implanted silicon ions 69 in the oxide region 63, over the drain region 71 of between about 5.0 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 60.
Claim 17
Dependent Claim
115 words
An IGFET device comprising: a semiconductor substrate having a channel region; a first insulating silicon-dioxide layer on a surface of the silicon substrate having an oxide region overlying the channel region; a first conductive gate layer over a portion of the gate oxide region; a second insulating silicon-dioxide layer having an oxide region overlying the first conductive gate layer; characterized by implanted silicon ions 75 in the oxide region 67 of the second layer, and over the first conductive gate layer 66, of between about 5.0 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 60.
Claim 18
Dependent Claim
115 words
An IGFET device comprising: a semiconductor substrate having a channel region; a first insulating silicon-dioxide layer on a surface of the silicon substrate having an oxide region overlying the channel region; a first conductive gate layer over a portion of the gate oxide region; a second insulating silicon-dioxide layer having an oxide region overlying the first conductive gate layer; characterized by implanted silicon ions 75 in the oxide region 67 of the second layer, and over the first conductive gate layer 66, of between about 5.0 and 20x10¹⁵ ions/cm² forming silicon dioxide traps in said gate oxide region, with the maximum density of the ions being displaced from the surface of the silicon substrate 60.
References Cited (Backward Citations)
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