EP0340890A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Programmable logic device with array blocks connected via a programmable interconnect array
Assignee: Altera Corp
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Filing: 1989-02-23
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Granted: —
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Expires: 2009-02-23
Abstract
Abstract A programmable logic device having a relatively small number of programmable product terms (OE,SETN,P0,P1,P2,INV,ACLK,CLEARN) ("P-terms") feeding each fixed combinatorial logic device (51), and additional "expander" programmable P-terms (EXP1,EXP2) which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitably programming the P-terms feeding the fixed devices. More complex logic functions can be performed by suitably programming the required number of expander P-terms, and then combining the outputs of those P-terms by means of another P-term. In addition, a programmable interconnect array (60) is provided to allow certain inputs (40) to the device to be applied to any programmable portion of the device, and also to allow the outputs of at least one of the fixed devices to be also applied to any programmable portion of the device.
Inventors
- 👤 Sau-Ching Wong
- 👤 Hock-Chuen So
- 👤 Stanley John Kopec, Jr.
- 👤 Robert F. Hartmann
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 05:25
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736; H03K19/17704; H03K19/17724; H03K19/17728; H10; H10W; H10W72/00; H10W72/50; H10W72/541; H10W72/547; H10W72/5473; H10W72/90; H10W72/931; H10W72/932
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
201 words
A programmable logic device for producing a plurality of first signals, each of which is a programmable logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device comprising: a plurality of first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said first P-term line conductors a third signal which is a logical function of the second signals applied to the word line conductors to which that first P-term line conductor is interconnected; means for logically combining said third signals to produce a first of said first signals; at least one second P-term line conductor which is programmably interconnectable to each of said word line conductors for producing on said second P-term line conductor a second of said first signals which is a logical function of the second signals applied to the word line conductors to which said second P-term line conductor is interconnected; and means for applying said second of said first signals to one of said word line conductors as the second signal applied to that word line conductor.
Claim 2
Dependent Claim
201 words
A programmable logic device for producing a plurality of first signals, each of which is a programmable logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device comprising: a plurality of first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said first P-term line conductors a third signal which is a logical function of the second signals applied to the word line conductors to which that first P-term line conductor is interconnected; means for logically combining said third signals to produce a first of said first signals; at least one second P-term line conductor which is programmably interconnectable to each of said word line conductors for producing on said second P-term line conductor a second of said first signals which is a logical function of the second signals applied to the word line conductors to which said second P-term line conductor is interconnected; and means for applying said second of said first signals to one of said word line conductors as the second signal applied to that word line conductor.
Claim 3
Dependent Claim
24 words
The apparatus defined in claim 1 wherein said second of said first signals is applied solely to said one of said word line conductors.
Claim 4
Dependent Claim
30 words
The apparatus defined in claim 1 further comprising means for logically inverting said second of said first signals prior to applying it to said one of said word line conductors.
Claim 5
Dependent Claim
52 words
The apparatus defined in claim 1 wherein there is a plurality of said second P-term line conductors, each of which is connected to a respective one of said word line conductors, and wherein the number of said second P-term line conductors is greater than the number of said first P-term line conductors.
Claim 6
Dependent Claim
38 words
The apparatus defined in claim 1 wherein said first and second P-term line conductors comprise a macrocell, and wherein said apparatus includes a plurality of said macrocells, said word line conductors being common to all of said macrocells.
Claim 7
Dependent Claim
31 words
The apparatus defined in claim 5 wherein the number of macrocells in said apparatus is greater than the number of said first P-term line conductors in any one of said macrocells.
Claim 8
Dependent Claim
35 words
The apparatus defined in claim 5 wherein the total number of said second P-term line conductors in said apparatus is greater than the number of first P-term line conductors in any one of said macrocells.
Claim 9
Dependent Claim
30 words
The apparatus defined in claim 5 wherein in any one macrocell, the number of said first P-term line conductors is greater than the number of said second P-term line conductors.
Claim 10
Independent Claim
365 words
The method of using a programmable logic device to produce a first signal which is a predetermined logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device having (1) a plurality of first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said first P-term line conductors a third signal which is a logical function of the second signals applied to the word line conductors to which that first P-term line conductor is interconnected; (2) means for logically combining said third signals to produce said first signal; (3) a plurality of second P-term line conductors greater in number than the number of said first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said second P-term line conductors a fourth signal which is a logical function of the second signals applied to the word line conductors to which that second P-term line conductor is interconnected; and (4) means for applying each of said fourth signals to a respective one of said word line conductors as the second signal applied to that word line conductor, said method comprising the steps of: if said predetermined logical function is sufficiently simple that said first signal can be produced solely by use of said first P-term line conductors, then programmably interconnecting at least some of said P-term line conductors to said word line conductors in the manner required to produce said first signal, and omitting the following steps; if said predetermined logical function is too complex to allow said first signal to be produced solely by use of said first P-term line conductors, then programmably interconnecting at least some of said second P-term line conductors to said word line conductors in the manner required to produce a plurality of fourth signals which are respectively the P-terms of said predetermined logical function; and programmably interconnecting at least one of said first P-term line conductors to the word line conductors to which said plurality of fourth signals is applied.
Claim 11
Independent Claim
365 words
The method of using a programmable logic device to produce a first signal which is a predetermined logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device having (1) a plurality of first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said first P-term line conductors a third signal which is a logical function of the second signals applied to the word line conductors to which that first P-term line conductor is interconnected; (2) means for logically combining said third signals to produce said first signal; (3) a plurality of second P-term line conductors greater in number than the number of said first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said second P-term line conductors a fourth signal which is a logical function of the second signals applied to the word line conductors to which that second P-term line conductor is interconnected; and (4) means for applying each of said fourth signals to a respective one of said word line conductors as the second signal applied to that word line conductor, said method comprising the steps of: if said predetermined logical function is sufficiently simple that said first signal can be produced solely by use of said first P-term line conductors, then programmably interconnecting at least some of said P-term line conductors to said word line conductors in the manner required to produce said first signal, and omitting the following steps; if said predetermined logical function is too complex to allow said first signal to be produced solely by use of said first P-term line conductors, then programmably interconnecting at least some of said second P-term line conductors to said word line conductors in the manner required to produce a plurality of fourth signals which are respectively the P-terms of said predetermined logical function; and programmably interconnecting at least one of said first P-term line conductors to the word line conductors to which said plurality of fourth signals is applied.
Claim 12
Dependent Claim
169 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; and (3) a clock signal utilization device for processing a signal derived from at least one first P-term line conductor in accordance with an applied clock signal, the improvement comprising: means for providing a first signal which can be selected to be either a synchronous clock signal or a constant signal; means associated with at least one second P-term line conductor for allowing the signal on said second P-term line conductor to be made a constant signal; and means for logically combining said first signal and a signal derived from the signal on said second P-term line conductor to produce said applied clock signal.
Claim 13
Dependent Claim
169 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; and (3) a clock signal utilization device for processing a signal derived from at least one first P-term line conductor in accordance with an applied clock signal, the improvement comprising: means for providing a first signal which can be selected to be either a synchronous clock signal or a constant signal; means associated with at least one second P-term line conductor for allowing the signal on said second P-term line conductor to be made a constant signal; and means for logically combining said first signal and a signal derived from the signal on said second P-term line conductor to produce said applied clock signal.
Claim 14
Dependent Claim
32 words
The apparatus defined in claim 10 wherein said means for logically combining said first signal and said signal derived from the signal on said second P-term line conductor comprises an OR gate.
Claim 15
Dependent Claim
310 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; (3) means for producing a set signal; (4) means for producing a clear signal; and (5) means for producing a clock signal, the improvement comprising: means responsive to said set signal, said clear signal, said clock signal, and a data signal derived from at least one first P-term line conductor signal for producing an output signal having (1) a first polarity when each of said set and clear signals has a second polarity, said data signal has a first polarity, and said clock signal changes from a first to a second polarity; (2) a second polarity when each of said set, clear, and data signals has a second polarity, and said clock signal changes from a first to a second polarity; (3) a first polarity when said set signal has a second polarity and said clear signal has a first polarity; (4) a second polarity when said set signal has a first polarity and said clear signal has a second polarity; (5) the polarity that said output signal had when each of said set and clear signals has a first polarity and said clock signal first changes from a second polarity to a first polarity; (6) a first polarity when each of said set, clear, and data signals has a first polarity and said clock signal has a second polarity; and (7) a second polarity when each of said set and clear signals has a first polarity and said data signal has a second polarity.
Claim 16
Dependent Claim
310 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; (3) means for producing a set signal; (4) means for producing a clear signal; and (5) means for producing a clock signal, the improvement comprising: means responsive to said set signal, said clear signal, said clock signal, and a data signal derived from at least one first P-term line conductor signal for producing an output signal having (1) a first polarity when each of said set and clear signals has a second polarity, said data signal has a first polarity, and said clock signal changes from a first to a second polarity; (2) a second polarity when each of said set, clear, and data signals has a second polarity, and said clock signal changes from a first to a second polarity; (3) a first polarity when said set signal has a second polarity and said clear signal has a first polarity; (4) a second polarity when said set signal has a first polarity and said clear signal has a second polarity; (5) the polarity that said output signal had when each of said set and clear signals has a first polarity and said clock signal first changes from a second polarity to a first polarity; (6) a first polarity when each of said set, clear, and data signals has a first polarity and said clock signal has a second polarity; and (7) a second polarity when each of said set and clear signals has a first polarity and said data signal has a second polarity.
Claim 17
Dependent Claim
26 words
The apparatus defined in claim 12 wherein the improvement further comprises means for deriving said set signal from at least one second P-term line conductor signal.
Claim 18
Dependent Claim
25 words
The apparatus defined in claim 12 wherein the improvement further comprises means for deriving said clear signal from at least one third P-term conductor signal.
Claim 19
Dependent Claim
26 words
The apparatus defined in claim 12 wherein the improvement further comprises means for selectively deriving said clock signal from at least one fourth P-term conductor signal.
Claim 20
Dependent Claim
254 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; (3) means for producing a set signal; (4) means for producing a clear signal; and (5) means for producing a clock signal, the improvement comprising: means responsive to said set signal, said clear signal, said clock signal, and a data signal derived from at least one first P-term line conductor signal for producing an output signal having (1) a polarity which is determined by the polarity of said data signal when each of said set and clear signals has a second polarity and said clock signal changes from a first polarity to a second polarity; (2) a polarity determined by one of said set and clear signals when the polarities of said set and clear signals are opposite to one another; (3) the polarity that said otuput signal had when each of said set and clear signals has a first polarity and said clock signal first changes from a second polarity to a first polarity; and (4) a polarity which is determined by the polarity of said data signal when each of said set and clear signals has a first polarity and said clock signal has a second polarity.
Claim 21
Dependent Claim
254 words
In a programmable logic device having (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; (3) means for producing a set signal; (4) means for producing a clear signal; and (5) means for producing a clock signal, the improvement comprising: means responsive to said set signal, said clear signal, said clock signal, and a data signal derived from at least one first P-term line conductor signal for producing an output signal having (1) a polarity which is determined by the polarity of said data signal when each of said set and clear signals has a second polarity and said clock signal changes from a first polarity to a second polarity; (2) a polarity determined by one of said set and clear signals when the polarities of said set and clear signals are opposite to one another; (3) the polarity that said otuput signal had when each of said set and clear signals has a first polarity and said clock signal first changes from a second polarity to a first polarity; and (4) a polarity which is determined by the polarity of said data signal when each of said set and clear signals has a first polarity and said clock signal has a second polarity.
Claim 22
Dependent Claim
26 words
The apparatus defined in claim 16 wherein the improvement further comprises means for deriving said set signal from at least one second P-term line conductor signal.
Claim 23
Dependent Claim
26 words
The apparatus defined in claim 16 wherein the improvement further comprises means for deriving said clear signal from at least one third P-term line conductor signal.
Claim 24
Dependent Claim
27 words
The apparatus defined in claim 16 wherein the improvement further comprises means for selectively deriving said clock signal from at least one fourth P-term line conductor signal.
Claim 25
Dependent Claim
123 words
A programmable logic device comprising: first and second logic array blocks, each including (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; and (3) means for deriving an output signal from at least one of said P-term line conductor signals; and programmable means for selectively applying the output signal of at least one logic array block to at least one of the word line conductors of the other of said logic array blocks.
Claim 26
Dependent Claim
123 words
A programmable logic device comprising: first and second logic array blocks, each including (1) a plurality of word line conductors; (2) a plurality of P-term line conductors, each of which is programmably interconnectable to at least some of said word line conductors for producing on each P-term line conductor a signal which is a logical function of the signals on the word line conductors to which that P-term line conductor is interconnected; and (3) means for deriving an output signal from at least one of said P-term line conductor signals; and programmable means for selectively applying the output signal of at least one logic array block to at least one of the word line conductors of the other of said logic array blocks.
Claim 27
Dependent Claim
39 words
The apparatus defined in claim 20 further comprising: means for applying the output signal of said at least one logic array block to at least one of the word line conductors of said at least one logic array block.
Claim 28
Dependent Claim
42 words
The apparatus defined in claim 20 wherein at least one of said P-term line conductor signals in at least one of said logic array blocks is applied only to at least one of the word line conductors of that logic array block.
Claim 29
Dependent Claim
40 words
The apparatus defined in claim 20 wherein at least one of said P-term line conductor signals in at least one of said logic array blocks is applied only to one of the word line conductors of that logic array block.
Claim 30
Dependent Claim
47 words
The apparatus defined in claim 20 further comprising: means for receiving an input signal applied to the programmable logic device; and programmable means for selectively applying said input signal to at least one of the word line conductors of at least one of said logic array blocks.
Claim 31
Dependent Claim
47 words
The apparatus defined in claim 20 further comprising: means for receiving an input signal applied to the programmable logic device; and programmable means for selectively applying said input signal to at least one of the word line conductors of either or both of said logic array blocks.
References Cited (Backward Citations)
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