Data transmission and recording

Claim 2

Data transmission apparatus capable of selecting a first mode in which one data unit is made up of m bits and a second mode in which one data unit is made up of n bits (m > n) with the same sampling frequency, the apparatus comprising: error-correction encoding means (15) commonly used for the first and second modes; insertion means (13) for inserting (m - n) insertion bits of dummy data into said data unit; elimination means (16) for eliminating said (m - n) insertion bits from the data unit; and addition means (18) for adding header information including at least a block synchronization signal to the data; in said first mode, m-bit data units are subjected to an encoding process at said error-correction encoding means (15), a block synchronization signal for one-unit-m-bits data is added for every block of the encoded data at said addition means (18), and data from the addition means (18) is transmitted; and in said second mode, said insertion bits are inserted in each data unit of one-unit-n-bits data, at said insertion means (13) so as to make one-unit-m-bits data, said data are subjected to an encoding process at said error-correction encoding means (15), said insertion bits are eliminated from said encoded data at said elimination (16) means to return them to one-unit-n-bits data, data from said elimination means (16) is supplied to said addition means (18), a block synchronization signal for one-unit-n-bits data is added for every block of the encoded data at said addition means (18), and data from the addition means (18) is transmitted.

Claim 3

Apparatus for receiving transmission data from apparatus according to claim 1, the receiving apparatus comprising: synchronization detection means (23) for detecting the block synchronization signal in the transmission data; switching signal generating means (25) for detecting whether the detected block synchronization signal is a first block synchronization signal or a second block synchronization signal and generating a mode switching signal; inserting means (28) for inserting (m - n) insertion bits of dummy data; error-correction decoding means (29) used commonly for the first and second modes; and elimination means (31) for eliminating the (m - n) insertion bits from the data; when the first mode is selected by said mode switching signal, the data from said synchronization detection means (23) being subjected to an error-correction decoding process at said error-correction decoding means (29), and one-unit-m-bit data is decoded; and when the second mode is selected by said mode switching signal, the data from said synchronization detection means (23) are supplied to said insertion means (28) so that said insertion bits are inserted for every unit of the one-unit-n-bit data to make one-unit-m-bit data, these data are supplied to said error-correction decoding means (29) and decoding-processed, the decoding-processed data are fed to said elimination means (31), and said insertion bits are eliminated so as to decode the one-unit-n-bit data.

Claim 4

Apparatus according to claim for receiving transmission data with an identification code for identifying the first mode and the second mode, wherein the switching signal generating means (25) decodes said identification signal to form a mode switching signal.

Claim 5

Apparatus for receiving data selectively transmitted in a first mode in which one unit is made up of m bits or in second mode in which one unit is made up of n bits (m > n) with the same sampling frequency, the apparatus comprising: switching signal generating means (25) for detecting whether the received data are first mode data or second mode data and generating a mode switching signal in dependence thereon; insertion means (28) for inserting (m - n) insertion bits of dummy data; error-correction decoding means (29) used commonly for the first and modes; and elimination means (31) for eliminating the (m - n) insertion bits from the data; when the first mode is selected by said mode switching signal, the received data are subjected to an error-correction decoding process at said error-correction decoding means (29), and one-unit-m-bit data are decoded; and when the second code is selected by said mode switching signal, the received data are supplied to said insertion means (28) so that said insertion bits are inserted in every unit of the one-unit-n-bit data to make one-unit-m-bit data, these data are supplied to said error-­correction decoding means (29) and decoding-processed, the decoding-­processed data are fed to said elimination (31) means and said insertion bits are eliminated so as to decode the one-unit-n-bit data.

Claim 6

Apparatus for receiving data selectively transmitted in a first mode in which one unit is made up of m bits or in second mode in which one unit is made up of n bits (m > n) with the same sampling frequency, the apparatus comprising: switching signal generating means (25) for detecting whether the received data are first mode data or second mode data and generating a mode switching signal in dependence thereon; insertion means (28) for inserting (m - n) insertion bits of dummy data; error-correction decoding means (29) used commonly for the first and modes; and elimination means (31) for eliminating the (m - n) insertion bits from the data; when the first mode is selected by said mode switching signal, the received data are subjected to an error-correction decoding process at said error-correction decoding means (29), and one-unit-m-bit data are decoded; and when the second code is selected by said mode switching signal, the received data are supplied to said insertion means (28) so that said insertion bits are inserted in every unit of the one-unit-n-bit data to make one-unit-m-bit data, these data are supplied to said error-­correction decoding means (29) and decoding-processed, the decoding-­processed data are fed to said elimination (31) means and said insertion bits are eliminated so as to decode the one-unit-n-bit data.

Claim 7

Apparatus according to claim 4 wherein said switching signal generating means (25) comprises means for detecting a block synchronization signal in the received data.

Claim 8

Apparatus for recording a PCM audio signal on a magnetic tape medium (21) by magnetic heads (HA, HB), and capable of selecting a first mode in which one unit is made up of m bits and a second mode in which one unit is made up of n bits (m > n) with the same sampling frequency, the apparatus comprising: error-correction encoding means (15) used commonly for the first and second modes; insertion means (13) for inserting (m - n) insertion bits of dummy data into said unit data; elimination means (16) for eliminating said (m - n) insertion bits from the data; and addition means (18) for adding header information including at least a block synchronization signal to the data; in said first mode, data whose units are of m bits are subjected to an encoding process at said error-correction encoding means (15), a block synchronization signal for one-unit-m-bit data is added for every block of the encoding-processed data at said addition means (18), and data from the addition means (18) are transmitted; and in said second mode, said insertion bits are inserted in each unit of one-unit-n-bit data at said insertion means (13) so as to form one-­unit-m-bit data, said data are supplied to said error correction encoding means (15) and subjected to an encoding process, said insertion bits are eliminated from said encoding-processed data at said eliminating means (16) to return the data to one-unit-n-bit data, data from said elimination (16) means are supplied to said addition means (18), a block synchronization signal for one-unit-n-bit is added for every block, and data from the addition means (18) are transmitted to said magnetic heads (HA, HB) and recorded.

Claim 9

Apparatus for recording a PCM audio signal on a magnetic tape medium (21) by magnetic heads (HA, HB), and capable of selecting a first mode in which one unit is made up of m bits and a second mode in which one unit is made up of n bits (m > n) with the same sampling frequency, the apparatus comprising: error-correction encoding means (15) used commonly for the first and second modes; insertion means (13) for inserting (m - n) insertion bits of dummy data into said unit data; elimination means (16) for eliminating said (m - n) insertion bits from the data; and addition means (18) for adding header information including at least a block synchronization signal to the data; in said first mode, data whose units are of m bits are subjected to an encoding process at said error-correction encoding means (15), a block synchronization signal for one-unit-m-bit data is added for every block of the encoding-processed data at said addition means (18), and data from the addition means (18) are transmitted; and in said second mode, said insertion bits are inserted in each unit of one-unit-n-bit data at said insertion means (13) so as to form one-­unit-m-bit data, said data are supplied to said error correction encoding means (15) and subjected to an encoding process, said insertion bits are eliminated from said encoding-processed data at said eliminating means (16) to return the data to one-unit-n-bit data, data from said elimination (16) means are supplied to said addition means (18), a block synchronization signal for one-unit-n-bit is added for every block, and data from the addition means (18) are transmitted to said magnetic heads (HA, HB) and recorded.

Claim 10

Apparatus according to claim 1 or claim 6 further comprising means for compressing one-unit-m-bits data to one-unit-n-bits data prior to inserting said (m - n) bits of dummy data.

Claim 11

Apparatus according to claim 1 or claim 6 further comprising a word/symbol data converter (14) for dividing said data units into upper bit data symbols and lower bit data symbols prior to said error-­correction encoding means (15).

Claim 12

Apparatus according to claim 8 further comprising a bit-number conversion circuit (17) for modifying the bit patterns of said data prior to said addition means (18), to reduce the dc component.

Claim 13

Apparatus according to claim 9 wherein said insertion means (13) adds said dummy data as the upper bits of said data units.

Claim 14

Apparatus according to claim 9 wherein said insertion means (13) adds said dummy data as the upper bits and the lower bits respectively of alternate data units.

Claim 15

Apparatus according to claim 1 or claim 6 wherein said addition means (18) adds a mode identification signal indicating whether said first mode or said second mode is selected for the data.

Claim 16

Apparatus according to claim 6 wherein said first mode is selected when magnetic tape (2) of evaporated metal type is used, and said second mode is selected when magnetic tape (2) of metal powder type is used.