EP0332329A2
Expired / Lapsed
EP
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Method for making a semiconductor substrate including a strained layer superlattice structure
Assignee: Fujitsu Ltd
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Filing: 1989-02-28
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Granted: —
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Expires: 2009-02-28
Abstract
Abstract A semiconductor substrate comprising: a single-crystalline semiconductor wafer substrate; a strained layer superlattice (SLS) structure layer formed on the wafer substrate; and a compound semiconductor epitaxial layer formed on the SLS structure layer. According to the present invention, the SLS structure layer consists of pairs of a first compound semiconductor thin layer and a second compound semiconductor thin layer, the first and second thin layers having the same components in a compound system having a miscibility gap, and having different compositions outside of the miscibility gap including the limit line of the miscibility gap, respectively, at a temperature higher than that of heat-treatments applied to the compound semiconductor substrate, without a decay of the SLS structure.
Inventors
- 👤 Hiroshi Okuda
- 👤 Mitsuru Sugawara
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 19:22
CPC Classifications
H; H10; H10H; H10H20/00; H10H20/80; H10H20/81; H10H20/811; B; B82; B82Y; B82Y20/00; H10D; H10D62/00; H10D62/80; H10D62/81; H10D62/815; H10D62/8161; H10D62/8162; H10D62/8164; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/2907; H10P14/2911; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3218; H10P14/3221; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/3252; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3418; H10P14/3421; H10P14/3422
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
110 words
A semiconductor substrate comprising: a single-crystalline semiconductor wafer substrate; a strained layer superlattice structure layer formed on said wafer substrate; and a compound semiconductor epitaxial layer formed on said strained layer superlattice structure layer; characterized in that said strained layer superlattice structure layer comprises pairs of a first compound semiconductor thin layer and a second compound semiconductor thin layer, said first and second thin layers having the same components in a compound system having a miscibility gap, and having different compositions outside of the miscibility gap, including the limit line of the miscibility gap, respectively, at a temperature higher than that of a heat-treatment applied to said compound semiconductor substrate.
Claim 2
Dependent Claim
110 words
A semiconductor substrate comprising: a single-crystalline semiconductor wafer substrate; a strained layer superlattice structure layer formed on said wafer substrate; and a compound semiconductor epitaxial layer formed on said strained layer superlattice structure layer; characterized in that said strained layer superlattice structure layer comprises pairs of a first compound semiconductor thin layer and a second compound semiconductor thin layer, said first and second thin layers having the same components in a compound system having a miscibility gap, and having different compositions outside of the miscibility gap, including the limit line of the miscibility gap, respectively, at a temperature higher than that of a heat-treatment applied to said compound semiconductor substrate.
Claim 3
Dependent Claim
17 words
A semiconductor substrate according to claim 1, wherein said wafer substrate is composed of a compound semiconductor.
Claim 4
Dependent Claim
24 words
A semiconductor substrate according to claim 2, wherein said compound semiconductor is selected from the group consisting of GaAs, InP, GaP, GaSb, and InAs.
Claim 5
Dependent Claim
15 words
A semiconductor substrate according to claim 1, wherein said wafer substrate is composed of silicon.
Claim 6
Dependent Claim
23 words
A semiconductor substrate according to claim 1, wherein a lattice constant of said epitaxial layer is equal to that of said wafer substrate.
Claim 7
Dependent Claim
23 words
A semiconductor substrate according to claim 1, wherein a lattice constant of said epitaxial layer is different from that of said wafer substrate.
Claim 8
Dependent Claim
27 words
A semiconductor substrate according to claim 5, wherein a ratio of the thickness of said first thin layer to that of said second thin layer is constant.
Claim 9
Dependent Claim
28 words
A semiconductor substrate according to claim 6, wherein a ratio of the thickness of said first thin layer to that of said second thin layer is gradually varied.
Claim 10
Dependent Claim
43 words
A semiconductor substrate according to claim 6, wherein a ratio of the thickness of said first thin layer to that of said second thin layer is constant, and the composition of one of said first and or second thin layer is gradually varied.
Claim 11
Dependent Claim
37 words
A semiconductor substrate according to claim 3, wherein said wafer substrate is composed of GaAs, said epitaxial layer is composed of InGaP, and said first and second thin layers are composed of compounds in a GaP-InP system.
Claim 12
Dependent Claim
54 words
A semiconductor substrate according to claim 4, wherein said compound semiconductor substrate further comprises a GaAs buffer layer on said silicon wafer substrate, said epitaxial layer is composed of GaAs, and said first and second thin layers are composed of compounds selected from the group consisting of InP-GaP system, GaP-GaSb system and GaP-InAs system.
Claim 13
Dependent Claim
23 words
A semiconductor substrate according to claim 1, wherein the difference between the miscibility gap temperature and the heat-treatment temperature is 10°C or more.
References Cited (Backward Citations)
No citation records indexed.
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