EP0330142A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Multi-gate field-effect transistor
Assignee: Toshiba Corp
•
Filing: 1989-02-21
•
Granted: —
•
Expires: 2009-02-21
Abstract
Abstract A field-effect transistor structure comprising a semiconductor substrate (1), a drain region (3) and a source region (4) on the substrate (1), a drain electrode (5) connected to the drain region (3), a source electrode (6) connected to the source region (4), and two or more divided gate electrodes (18, 19) on the substrate (1).
Inventors
- 👤 Yoshihiro Kishita
- 👤 Yutaka Tomisawa
- 👤 Shoichi Tanimata
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 01:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/611; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/6871; H10D30/80; H10D30/87; H10D30/873; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/257; H10D64/256
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
69 words
A field-effect transistor structure comprising: a semiconductor substrate (1); a drain region (3) and a source region (4) formed on the semiconductor substrate so as to be adjacent to each other; a drain electrode (5) connected to the drain region; a source electrode (6) connected to the source region; and two or more divided gate electrodes (18, 19) disposed between the drain region (3) and the source region (4).
Claim 2
Dependent Claim
69 words
A field-effect transistor structure comprising: a semiconductor substrate (1); a drain region (3) and a source region (4) formed on the semiconductor substrate so as to be adjacent to each other; a drain electrode (5) connected to the drain region; a source electrode (6) connected to the source region; and two or more divided gate electrodes (18, 19) disposed between the drain region (3) and the source region (4).
Claim 3
Dependent Claim
30 words
The field-effect transistor structure according to claim 1, characterized in that said gate electrodes (18, 19) are situated closer to the source electrode (6) than to the drain electrode (5).
Claim 4
Dependent Claim
24 words
The field-effect transistor structure according to claim 1, characterized by further comprising an external switching circuit (SW1, SW2) connected to said gate electrode (18).
Claim 5
Dependent Claim
28 words
The field-effect transistor structure according to claim 1, characterized in that an operating layer (2) is formed over the semiconductor substrate (1), with an insulating film interposed therebetween.
Claim 6
Dependent Claim
23 words
The field-effect transistor structure according to claim 1, characterized by further comprising a branch source electrode (20) connected to said source electrode (6).
Claim 7
Dependent Claim
22 words
The field-effect transistor structure according to claim 1, characterized by further comprising biasing means (14, 15) connected to said source electrode (6).
Claim 8
Dependent Claim
21 words
The field-effect transistor structure according to claim 1, characterized in that said gate electrodes (60, 61, 62) are divided in three.
Claim 9
Dependent Claim
34 words
The field-effect transistor structure according to claim 1, characterized by further comprising a second gate electrode (7) provided between said drain electrode (5) and said source electrode (6), to constitute a dual gate FET.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.