EP0328422A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Microcomputer system
Assignee: NEC Corp
•
Filing: 1989-02-13
•
Granted: —
•
Expires: 2009-02-13
Abstract
Abstract A microcomputer system comprises a microcomputer assembled on a first substrate, and a peripheral device assembled on a second substrate which is discrete from the first substrate. The microcomputer and the peripheral device are coupled to each other through a bus. The peripheral device includes a memory for storing a program to be executed by the microcomputer, an input/output port for performing an input and output of data between the microcomputer system and a device external to the microcomputer system, and a control circuit for controlling a transfer of the data and the program between the microcomputer and the peripheral device. The control circuit includes an address latch for indicating an address for the memory, an incrementer for updating a content of the address latch, and a bus interface for transferring the program and the data between the microcomputer and the peripheral device. The microcomputer operates to output an address for the input/output port so that the data can be transferred between the microcomputer and the input/output through the bus interface. The microcomputer operates to output an update control signal to the incrementer so as to cause the content of the address latch to be updated without supplying an address for the memory so that the program can continuously be transferred from the memory to the microcomputer through the bus.
Inventors
- 👤 Kazuhiro Takeuchi
- 👤 Hajime Sakuma
- 👤 Yukihiro Nishiguchi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 02:16
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3802; G06F9/32; G06F9/321
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
239 words
A microcomputer system comprising first processing means assembled on a first substrate and including at least instruction execution means, and second processing means assembled on a second substrate which is discrete from the first substrate, the first and second processing means being coupled to each other through a bus, the second processing means including memory means for storing a program to be executed by the instruction execution means, input/output means for performing an input and output of data between the microcomputer system and a device external to the microcomputer system, and control means for controlling a transfer of the data and the program between the first and second processing means, the control means including means for indicating an address for the memory means, means for updating a content of the address indicating means, and means for transferring the program and the data between the first and second processing means, the instruction execution means operating to output an address for the input/output means so that the data can be transferred between the first processing means and the input/output means through the transfer means, the instruction execution means operating to output an update control signal to the updating means so as to cause the content of the indicating means to be updated without supplying an address for the memory means so that the program can continuously be transferred from the memory means to the first processing means through the transfer means.
Claim 2
Dependent Claim
239 words
A microcomputer system comprising first processing means assembled on a first substrate and including at least instruction execution means, and second processing means assembled on a second substrate which is discrete from the first substrate, the first and second processing means being coupled to each other through a bus, the second processing means including memory means for storing a program to be executed by the instruction execution means, input/output means for performing an input and output of data between the microcomputer system and a device external to the microcomputer system, and control means for controlling a transfer of the data and the program between the first and second processing means, the control means including means for indicating an address for the memory means, means for updating a content of the address indicating means, and means for transferring the program and the data between the first and second processing means, the instruction execution means operating to output an address for the input/output means so that the data can be transferred between the first processing means and the input/output means through the transfer means, the instruction execution means operating to output an update control signal to the updating means so as to cause the content of the indicating means to be updated without supplying an address for the memory means so that the program can continuously be transferred from the memory means to the first processing means through the transfer means.
Claim 3
Dependent Claim
45 words
A microcomputer system claimed in Claim 1 further including means for designating a function of the input/output means so that one of a plurality of functions can be designated for the input/output means by previously designating the plurality of functions to the function designating means.
Claim 4
Dependent Claim
50 words
A microcomputer system claimed in Claim 1 wherein the address indicating means is composed of an address latch and the means for updating the content of the address indicating means includes an incrementer which receives the output of the address latch for incrementing the received address after each program reading.
Claim 5
Dependent Claim
172 words
A data processing circuit which can be coupled through a bus to a microcomputer assembled on a substrate discrete from a substrate of the data processing circuit, comprising memory means for storing a program to be executed by the microcomputer, input/output means for performing an input and output of data between the microcomputer system and a device external to the microcomputer system, and control means for controlling a transfer of the data and the program between the microcomputer and the data processing circuit, the control means including means for indicating an address for the memory means, means for updating a content of the address indicating means, and means for transferring the program and the data between the microcomputer and the data processing circuit, so that when an instruction code should be continuously read from the memory means, the updating means is caused to update the content of the indicating means without being supplied with an address for the memory means so that the program can continuously be transferred from the memory means.
Claim 6
Dependent Claim
172 words
A data processing circuit which can be coupled through a bus to a microcomputer assembled on a substrate discrete from a substrate of the data processing circuit, comprising memory means for storing a program to be executed by the microcomputer, input/output means for performing an input and output of data between the microcomputer system and a device external to the microcomputer system, and control means for controlling a transfer of the data and the program between the microcomputer and the data processing circuit, the control means including means for indicating an address for the memory means, means for updating a content of the address indicating means, and means for transferring the program and the data between the microcomputer and the data processing circuit, so that when an instruction code should be continuously read from the memory means, the updating means is caused to update the content of the indicating means without being supplied with an address for the memory means so that the program can continuously be transferred from the memory means.
Claim 7
Dependent Claim
44 words
A circuit claimed in Claim 4 further including means for designating a function of the input/output means so that one of a plurality of functions can be designated for the input/output means by previously designating the plurality of functions to the function designating means.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.