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EP0328346A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Noise reduction circuits

Assignee: Sony Corp
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Filing: 1989-02-07
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Granted: —
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Expires: 2009-02-07
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Abstract

Abstract A noise reduction circuit comprises a high-pass filter (34) for extracting a signal component containing noise from an input signal, a variable level limiter (35) for limiting the level of the signal component extracted by the filter (34) to produce a noise suppressing signal, and a level adjuster (44) for adjusting the level of the noise suppressing signal. A level detector (46) detects the level of the input signal, and a control signal generator (47) generates first and second control signals based on the detected output of the level detector (46), supplies the first control signal to the level limiter (35) so as to control the limit level thereof, and supplies the second control signal to the level adjuster (44) so as to control the gain thereof. In a signal subtracter (33), the noise suppressing signal from the level adjuster (44) is added with reversed polarity to the input signal to suppress the noise contained in the input signal and thereby produce a low-noise output signal.

Inventors

  • 👤 Hiroaki C/O Patents Division Matsumoto
  • 👤 Tetsuya C/O Patents Division Senda
  • 👤 Tokuya C/O Patents Division Fukuda

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-24 17:06
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/21; H04N5/213; H03; H03G; H03G7/00; H03G7/002

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 304 words
A noise reduction circuit for reducing noise contained in an input signal, the circuit comprising: input means (31) for receiving an input signal that includes a signal component containing noise; filter means (34) connected to said input means (31) for receiving the input signal and extracting the signal component containing noise from the input signal; level limiting means (35) connected to said filter means (34) for limiting a level of the signal component extracted by said filter means (34) to produce a noise suppressing signal; level adjusting means (44) connected to said level limiting means (35) for adjusting a level of the noise suppressing signal; signal subtracting means (33) connected to said input means (31) and said level adjusting means (44) and responsive to the input signal and the noise suppressing signal from said level adjusting means (44) so that the noise suppressing signal is added with reversed polarity to the input signal so as to suppress the noise contained in the input signal; and output means (45) connected to said signal subtracting means (33) for supplying an output signal derived from said signal subtracting means (45); characterized by: said level limiting means (35) being a variable level limiting means (35); level detecting means (46) connected to said input means (31) for receiving the input signal and producing a detection signal indicating a level of the input signal; and control signal generating means (47) connected to said level detecting means (46) for generating first and second control signals in response to said detection signal, supplying said first control signal to said variable level limiting means (35) so as to control a limit level of said variable level limiting means (35), and supplying said second control signal to said level adjusting means (44) so as to control a gain of said level adjusting means (44).
Claim 2
Dependent Claim 304 words
A noise reduction circuit for reducing noise contained in an input signal, the circuit comprising: input means (31) for receiving an input signal that includes a signal component containing noise; filter means (34) connected to said input means (31) for receiving the input signal and extracting the signal component containing noise from the input signal; level limiting means (35) connected to said filter means (34) for limiting a level of the signal component extracted by said filter means (34) to produce a noise suppressing signal; level adjusting means (44) connected to said level limiting means (35) for adjusting a level of the noise suppressing signal; signal subtracting means (33) connected to said input means (31) and said level adjusting means (44) and responsive to the input signal and the noise suppressing signal from said level adjusting means (44) so that the noise suppressing signal is added with reversed polarity to the input signal so as to suppress the noise contained in the input signal; and output means (45) connected to said signal subtracting means (33) for supplying an output signal derived from said signal subtracting means (45); characterized by: said level limiting means (35) being a variable level limiting means (35); level detecting means (46) connected to said input means (31) for receiving the input signal and producing a detection signal indicating a level of the input signal; and control signal generating means (47) connected to said level detecting means (46) for generating first and second control signals in response to said detection signal, supplying said first control signal to said variable level limiting means (35) so as to control a limit level of said variable level limiting means (35), and supplying said second control signal to said level adjusting means (44) so as to control a gain of said level adjusting means (44).
Claim 3
Dependent Claim 63 words
A circuit according to claim 1 wherein said control signal generating means (47) adjusts said first control signal so as to decrease an absolute value of said limit level in response to an increase in the level of the input signal and to increase the absolute value of said limit level in response to a decrease in the level of the input signal.
Claim 4
Dependent Claim 58 words
A circuit according to claim 1 wherein said variable level limiting means (35) comprises a pair of diodes (40, 42) coupled in anti-parallel with each other in relation to an output of said filter means (34) and biasing means (41, 43) operative to supply said diodes (40, 42) with bias voltages respectively controlled by the first control signal.
Claim 5
Dependent Claim 70 words
A circuit according to claim 3 wherein said biasing means (41, 43) comprises a first variable voltage source (41) for supplying one of said diodes (40) with a negative bias voltage and a second variable voltage source (43) for supplying the other of said diodes (42) with a positive bias voltage, each of said negative and positive bias voltages (41, 43) being varied in response to the first control signal.
Claim 6
Dependent Claim 65 words
A circuit according to claim 1 wherein said control signal generating means (47) adjusts said second control signal so as to decrease the gain of said level adjusting means (44) in response to an increase in the level of the input signal and to increase the gain of said level adjusting means (44) in response to a decrease in the level of the input signal.
Claim 7
Dependent Claim 27 words
A circuit according to claim 1 wherein said filter means (34) comprises a high pass filter (34) for extracting a high frequency component from the input signal.
Claim 8
Dependent Claim 26 words
A circuit according to any one of the preceding claims wherein said input signal comprises a luminance signal forming a part of a composite video signal.
Claim 9
Dependent Claim 20 words
A circuit according to claim 7 wherein said level detecting means (46) detects an average level of the luminance signal.
Claim 10
Dependent Claim 86 words
A circuit according to claim 7 wherein said filter means (52) comprises a first 1H delay device (53) supplied with the luminance signal, a second 1H delay device (54) connected in series with said first 1H delay device (53), a first adder (56) supplied with said luminance signal and an output of said second 1H delay device, and a second adder (59) supplied with an output of said first 1H delay device (53) and an output of said first adder (56) to produce said signal component.
Claim 11
Dependent Claim 73 words
A circuit according to claim 1 wherein said input signal comprises a luminance signal forming a part of a composite video signal generated by a video camera having automatic gain control means and means for generating an automatic gain control error signal, and said control signal generating means (47) is jointly responsive to said level detecting means (46) and said automatic gain control error signal for generating said first and second control signals.

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