EP0328286A2
Expired / Lapsed
EP
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Multicollector vertical PNP transistor
Assignee: Exar Corp
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Filing: 1989-01-31
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Granted: —
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Expires: 2009-01-31
Abstract
Abstract A vertical semiconductor device having a plurality of vertical active regions and a method for manufacturing such a vertical semiconductor device. In the preferred embodiment, a vertical multicollector pnp transistor is formed by disposing a plurality of n type epitaxial layers (20, 30) over a bottom p type substrate (10). Each epitaxial layer (20, 30) has a plurality of collector regions (27, 28) formed therein. The collector regions are connected using a single diffusion step to form vertical collectors (67, 68) for the pnp transistor. The base (55) is formed from the epitaxial layer (30) and the emitter (35, 36) is formed using a separate implant or diffusion step. Vertical isolation regions (51, 61, 52, 62, 53, 63) are formed contemporaneously with the vertical collectors. The resulting pnp transistor has vertical collectors and isolation regions formed with less silicon, fewer diffusion steps, and more precise and reduced dimensions.
Inventors
- 👤 Piccolo Giovanni Giannella
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 08:07
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/40; H10D62/00; H10D62/10; H10D62/13; H10D62/137
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
73 words
A method of fabricating a semiconductor device having multiple vertical regions including the steps of: forming a bottom substrate; forming a first epitaxial layer over said substrate; forming first conductive regions in said first epitaxial layer; forming a second epitaxial layer over said first epitaxial layer; forming second conductive regions in said second epitaxial layer; and selectively interconnecting said conductive regions to form a semiconductor device having a plurality of vertical conductive regions.
Claim 2
Independent Claim
73 words
A method of fabricating a semiconductor device having multiple vertical regions including the steps of: forming a bottom substrate; forming a first epitaxial layer over said substrate; forming first conductive regions in said first epitaxial layer; forming a second epitaxial layer over said first epitaxial layer; forming second conductive regions in said second epitaxial layer; and selectively interconnecting said conductive regions to form a semiconductor device having a plurality of vertical conductive regions.
Claim 3
Dependent Claim
18 words
The method of claim 1 wherein said device is a pnp transistor having a plurality of vertical collectors.
Claim 4
Dependent Claim
17 words
The method of claim 1 wherein the step of interconnecting said regions comprises a single diffusion step.
Claim 5
Dependent Claim
29 words
The method of claim 1 further comprising the step of forming conductive regions in said substrate, said vertical conductive regions including isolation regions diffused into said substrate conductive regions.
Claim 6
Independent Claim
89 words
A method of fabricating a multicollector vertical pnp transistor including the steps of; forming a p type substrate; forming a first n type epitaxial layer over said substrate; forming a first plurality of p type regions in said first epitaxial layer in predetermined spatial locations; forming a second epitaxial layer over said first epitaxial layer; forming a second plurality of p type regions in said second epitaxial layer in selective spatial locations; and diffusing said p regions to form a plurality of vertical collector regions for said pnp transistor.
Claim 7
Independent Claim
89 words
A method of fabricating a multicollector vertical pnp transistor including the steps of; forming a p type substrate; forming a first n type epitaxial layer over said substrate; forming a first plurality of p type regions in said first epitaxial layer in predetermined spatial locations; forming a second epitaxial layer over said first epitaxial layer; forming a second plurality of p type regions in said second epitaxial layer in selective spatial locations; and diffusing said p regions to form a plurality of vertical collector regions for said pnp transistor.
Claim 8
Dependent Claim
43 words
The method of claim 5 further comprising the steps of: forming an n type region in said p substrate; said epitaxial layers forming a base for said pnp transistor, said n type region blocking parasitic current from said base region to said substrate.
Claim 9
Dependent Claim
31 words
The method of claim 5 further comprising the step of forming at least one p type region in said second epitaxial layer to form at least one emitter for said transistor.
Claim 10
Dependent Claim
69 words
A vertical transistor comprising: a bottom substrate having a plurality of conductive regions disposed therein; a plurality of epitaxial layers successively disposed on top of said substrate, each said layer having at least one conductive region disposed therein in selective spatial locations, said at least one conductive region diffused to form at least one vertical region for said transistor; said epitaxial layers forming another conductive region for said transistor.
Claim 11
Dependent Claim
69 words
A vertical transistor comprising: a bottom substrate having a plurality of conductive regions disposed therein; a plurality of epitaxial layers successively disposed on top of said substrate, each said layer having at least one conductive region disposed therein in selective spatial locations, said at least one conductive region diffused to form at least one vertical region for said transistor; said epitaxial layers forming another conductive region for said transistor.
Claim 12
Independent Claim
71 words
A system of multiple vertical semiconductor devices comprising: a bottom substrate; a first plurality of conductive regions disposed in selective spatial locations in said substrate; a plurality of epitaxial layers disposed on top of said substrate, each said layer having a plurality of conductive regions disposed therein in selective spatial locations, said conductive regions interconnected to form a plurality of semiconductor devices each having at least one of vertical conductive region.
Claim 13
Independent Claim
71 words
A system of multiple vertical semiconductor devices comprising: a bottom substrate; a first plurality of conductive regions disposed in selective spatial locations in said substrate; a plurality of epitaxial layers disposed on top of said substrate, each said layer having a plurality of conductive regions disposed therein in selective spatial locations, said conductive regions interconnected to form a plurality of semiconductor devices each having at least one of vertical conductive region.
Claim 14
Dependent Claim
25 words
The system of claim 9 wherein a plurality of said vertical regions have a conductivity type and are spatially located to conductively isolate said devices.
Claim 15
Dependent Claim
20 words
The system of claim 9 wherein said vertical semiconductor devices comprise at least one pair of vertical collector npn-pnp transistors.
Claim 16
Dependent Claim
79 words
A vertical semiconductor device comprising: a bottom substrate having at least one conductive region disposed therein; at least one intermediate epitaxial layer disposed on top of said substrate, said intermediate epitaxial layer having a plurality of conductive regions disposed therein in selective spatial locations; a top epitaxial layer disposed above said intermediate layer, said top epitaxial layer having disposed therein a plurality of conductive regions in selective spatial locations, said regions selectively interconnected to form a vertical semiconductor device.
Claim 17
Dependent Claim
79 words
A vertical semiconductor device comprising: a bottom substrate having at least one conductive region disposed therein; at least one intermediate epitaxial layer disposed on top of said substrate, said intermediate epitaxial layer having a plurality of conductive regions disposed therein in selective spatial locations; a top epitaxial layer disposed above said intermediate layer, said top epitaxial layer having disposed therein a plurality of conductive regions in selective spatial locations, said regions selectively interconnected to form a vertical semiconductor device.
Claim 18
Dependent Claim
140 words
A pnp transistor having multiple vertical collectors comprising: a bottom p type substrate having an n type blocking region disposed in said substrate about a vertical axis; a first n type epitaxial layer disposed above said substrate, said epitaxial layer having formed therein two p type buried collector regions spaced equal distances opposite said vertical axis; a second n type epitaxial layer disposed above said first n type epitaxial layer, said second layer having formed therein two corresponding collector regions, each formed above one of said buried collector regions, said collector regions connected to form two vertical collectors; two emitter regions formed in said second epitaxial layer, each said emitter region disposed between one of said collectors and said axis; and a base region formed from the region of said epitaxial layers between the bottoms of said emitters and collectors.
Claim 19
Dependent Claim
140 words
A pnp transistor having multiple vertical collectors comprising: a bottom p type substrate having an n type blocking region disposed in said substrate about a vertical axis; a first n type epitaxial layer disposed above said substrate, said epitaxial layer having formed therein two p type buried collector regions spaced equal distances opposite said vertical axis; a second n type epitaxial layer disposed above said first n type epitaxial layer, said second layer having formed therein two corresponding collector regions, each formed above one of said buried collector regions, said collector regions connected to form two vertical collectors; two emitter regions formed in said second epitaxial layer, each said emitter region disposed between one of said collectors and said axis; and a base region formed from the region of said epitaxial layers between the bottoms of said emitters and collectors.
Claim 20
Dependent Claim
16 words
The transistor in claim 13 wherein said collector regions are connected by a single diffusion step.
References Cited (Backward Citations)
No citation records indexed.
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