EP0328262A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Programmable bonding pad with sandwiched silicon oxide and silicon nitride layers
Assignee: Exar Corp
•
Filing: 1989-01-23
•
Granted: —
•
Expires: 2009-01-23
Abstract
Abstract The present invention is a bonding pad structure and method for making the same which can be connected at the metalization step to form passive or active devices in addition to forming a bonding pad. A P-doped region (24) is formed in an epitaxial layer (28) in the area of the bonding pad (30) at the perimeter of a chip. This P-doped region (24) allows the formation of a junction capacitance between it and the epitaxial layer (28). In addition, by adding an oxide layer (32) over the P-doped region (34) an oxide capacitor can be formed between the metal bonding pad (30) and the P-doped region (34) with the oxide (32) as the dielectric. The oxide layer (32) is a special sandwich of two layers, silicon dioxide (36) and silicon nitride (37). The sandwiched layers protects the components beneath the bonding pad (30). The P-doped region (34) can also be used as a resistance by providing metal connections to both ends. Finally, a vertical PNP transistor can be formed between the P-doped region (34), the epitaxial layer (28) and a P-doped substrate (26).
Inventors
- 👤 Piccolo Giovanni Giannella
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 21:55
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10B; H10B69/00; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10W20/40; H10W20/49; H10W72/01; H10W72/012; H10W72/019; H10W72/20; H10W72/251; H10W72/29; H10W72/921; H10W72/923; H10W72/931; H10W72/932; H10W72/951; H10W72/952
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
130 words
A semiconductor chip having a plurality of bonding pad cells arranged around the perimeter of said chip, each bonding pad cell comprising: an N-doped epitaxial region having a surface large enough to receive a metal layer to form a bonding pad; a P-doped region extending from said surface into said epitaxial region; a layer of silicon dioxide extending over at least a portion of said P-doped region; a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; and at least one of said bonding pad cells having a metal bonding pad deposited over a substantial portion of said silicon nitride layer and at least one of said bonding pad cells having a metal contact other than a bonding pad coupled to said P-doped region.
Claim 2
Dependent Claim
130 words
A semiconductor chip having a plurality of bonding pad cells arranged around the perimeter of said chip, each bonding pad cell comprising: an N-doped epitaxial region having a surface large enough to receive a metal layer to form a bonding pad; a P-doped region extending from said surface into said epitaxial region; a layer of silicon dioxide extending over at least a portion of said P-doped region; a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; and at least one of said bonding pad cells having a metal bonding pad deposited over a substantial portion of said silicon nitride layer and at least one of said bonding pad cells having a metal contact other than a bonding pad coupled to said P-doped region.
Claim 3
Dependent Claim
27 words
The structure of claim 1 wherein at least one of said bonding pad cells forms an oxide capacitor between said metal bonding pad and said P-doped region.
Claim 4
Dependent Claim
33 words
The structure of claim 1 wherein at least one of said bonding pad cells further comprises first and second metal contacts coupled to opposite ends of said P-doped region to provide a resistor.
Claim 5
Dependent Claim
52 words
The structure of claim 1 wherein each said N-doped epitaxial region for each bonding pad cell is joined to a P-doped substrate and further comprising an N+ region providing an electrical connection to said epitaxial region and a P-doped isolation region surrounding said structure and extending from said surface to said substrate.
Claim 6
Dependent Claim
62 words
The structure of claim 4 wherein at least one of said bonding pad cells further comprises a first metal contact coupled to said P-doped region to form the emitter of a vertical PNP transistor, and a second metal contact coupled to said N+ region to form the base of said PNP transistor, and P-doped substrate being the collector of said PNP transistor.
Claim 7
Dependent Claim
26 words
The structure of claim 5 further comprising an N+ buried layer extending into said P-doped substrate, said N+ region being coupled to said N+ buried layer.
Claim 8
Dependent Claim
19 words
The structure of claim 6 further comprising at least a second N+ region coupled to said N+ buried layer.
Claim 9
Dependent Claim
36 words
The structure of claim 7 wherein at least one of said bonding pad cells further comprises first and second metal contacts coupled to said first mentioned and second N+ regions, respectively, to form a cross-under connection.
Claim 10
Independent Claim
149 words
A method for forming a plurality of bonding pad cells around the perimeter of a semiconductor chip comprising, for each of said bonding pad cells, the steps of: growing an N-doped epitaxial region having a bonding surface large enough to receive a metal layer to form a bonding pad; causing a P-type dopant to enter into said epitaxial region beneath said bonding surface to form a P-doped region; forming a layer of silicon dioxide extending over at least a portion of said P-doped region; forming a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; depositing a metal bonding pad over a substantial portion of said silicon nitride layer in at least one of said bonding pad cells; and depositing a metal line other than a bonding pad in contact with said P-doped region in at least one of said bonding pad cells.
Claim 11
Independent Claim
149 words
A method for forming a plurality of bonding pad cells around the perimeter of a semiconductor chip comprising, for each of said bonding pad cells, the steps of: growing an N-doped epitaxial region having a bonding surface large enough to receive a metal layer to form a bonding pad; causing a P-type dopant to enter into said epitaxial region beneath said bonding surface to form a P-doped region; forming a layer of silicon dioxide extending over at least a portion of said P-doped region; forming a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; depositing a metal bonding pad over a substantial portion of said silicon nitride layer in at least one of said bonding pad cells; and depositing a metal line other than a bonding pad in contact with said P-doped region in at least one of said bonding pad cells.
Claim 12
Dependent Claim
158 words
A semiconductor chip having a plurality of bonding pad cells arranged around the perimeter of said chip, each bonding pad cell comprising: a first N-doped epitaxial region having a surface large enough to receive a metal layer to form a bonding pad; a P-doped region extending from said surface into said first N-doped epitaxial region; a second N-doped region within said P-doped region; a layer of silicon dioxide extending over at least a portion of said P-doped region; a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; at least one of said bonding pad cells having a metal bonding pad deposited over a substantial portion of said silicon nitride layer; and at least one of said bonding pad cells having a first metal line coupled to said P-doped region as the base of an NPN transistor, said first and second N-doped regions being the collector and emitter of said NPN transistor.
Claim 13
Dependent Claim
158 words
A semiconductor chip having a plurality of bonding pad cells arranged around the perimeter of said chip, each bonding pad cell comprising: a first N-doped epitaxial region having a surface large enough to receive a metal layer to form a bonding pad; a P-doped region extending from said surface into said first N-doped epitaxial region; a second N-doped region within said P-doped region; a layer of silicon dioxide extending over at least a portion of said P-doped region; a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; at least one of said bonding pad cells having a metal bonding pad deposited over a substantial portion of said silicon nitride layer; and at least one of said bonding pad cells having a first metal line coupled to said P-doped region as the base of an NPN transistor, said first and second N-doped regions being the collector and emitter of said NPN transistor.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.